sravan/Marlin-Firmware
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

🎨 Cosmetic and comments

Browse Source
This commit is contained in:
Scott Lahteine
2023-12-16 23:22:38 -06:00
parent a3101a03ff
commit 39e42ebe6a
449 changed files with 3345 additions and 3655 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
Marlin/src/HAL/AVR/HAL.h
View File

@@ -1,7 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

2
Marlin/src/HAL/AVR/HAL_SPI.cpp
View File

@@ -119,7 +119,6 @@ void spiBegin() {
while (!TEST(SPSR, SPIF)) { /* Intentionally left empty */ } while (!TEST(SPSR, SPIF)) { /* Intentionally left empty */ }
} }
/** begin spi transaction */ /** begin spi transaction */
void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) { void spiBeginTransaction(uint32_t spiClock, uint8_t bitOrder, uint8_t dataMode) {
// Based on Arduino SPI library // Based on Arduino SPI library
@@ -175,7 +174,6 @@ void spiBegin() {
SPSR = clockDiv | 0x01; SPSR = clockDiv | 0x01;
} }
#else // SOFTWARE_SPI || FORCE_SOFT_SPI #else // SOFTWARE_SPI || FORCE_SOFT_SPI
// ------------------------ // ------------------------

1
Marlin/src/HAL/AVR/Servo.cpp
View File

@@ -63,7 +63,6 @@
static volatile int8_t Channel[_Nbr_16timers]; // counter for the servo being pulsed for each timer (or -1 if refresh interval) static volatile int8_t Channel[_Nbr_16timers]; // counter for the servo being pulsed for each timer (or -1 if refresh interval)
/************ static functions common to all instances ***********************/ /************ static functions common to all instances ***********************/
static inline void handle_interrupts(const timer16_Sequence_t timer, volatile uint16_t* TCNTn, volatile uint16_t* OCRnA) { static inline void handle_interrupts(const timer16_Sequence_t timer, volatile uint16_t* TCNTn, volatile uint16_t* OCRnA) {

1
Marlin/src/HAL/AVR/endstop_interrupts.h
View File

@@ -91,7 +91,6 @@ void endstop_ISR() { endstops.update(); }
#endif #endif
// Install Pin change interrupt for a pin. Can be called multiple times. // Install Pin change interrupt for a pin. Can be called multiple times.
void pciSetup(const int8_t pin) { void pciSetup(const int8_t pin) {
if (digitalPinHasPCICR(pin)) { if (digitalPinHasPCICR(pin)) {

1
Marlin/src/HAL/AVR/fastio/fastio_AT90USB.h
View File

@@ -682,7 +682,6 @@
#define PF7_PWM 0 #define PF7_PWM 0
#define PF7_DDR DDRF #define PF7_DDR DDRF
/** /**
* Some of the pin mapping functions of the Teensduino extension to the Arduino IDE * Some of the pin mapping functions of the Teensduino extension to the Arduino IDE
* do not function the same as the other Arduino extensions. * do not function the same as the other Arduino extensions.

4
Marlin/src/HAL/AVR/pinsDebug.h
View File

@@ -90,7 +90,6 @@ void PRINT_ARRAY_NAME(uint8_t x) {
#define GET_ARRAY_IS_DIGITAL(x) pgm_read_byte(&pin_array[x].is_digital) #define GET_ARRAY_IS_DIGITAL(x) pgm_read_byte(&pin_array[x].is_digital)
#if defined(__AVR_ATmega1284P__) // 1284 IDE extensions set this to the number of #if defined(__AVR_ATmega1284P__) // 1284 IDE extensions set this to the number of
#undef NUM_DIGITAL_PINS // digital only pins while all other CPUs have it #undef NUM_DIGITAL_PINS // digital only pins while all other CPUs have it
#define NUM_DIGITAL_PINS 32 // set to digital only + digital/analog #define NUM_DIGITAL_PINS 32 // set to digital only + digital/analog
@@ -164,7 +163,6 @@ static bool pwm_status(uint8_t pin) {
SERIAL_ECHO_SP(2); SERIAL_ECHO_SP(2);
} // pwm_status } // pwm_status
const volatile uint8_t* const PWM_other[][3] PROGMEM = { const volatile uint8_t* const PWM_other[][3] PROGMEM = {
{ &TCCR0A, &TCCR0B, &TIMSK0 }, { &TCCR0A, &TCCR0B, &TIMSK0 },
{ &TCCR1A, &TCCR1B, &TIMSK1 }, { &TCCR1A, &TCCR1B, &TIMSK1 },
@@ -182,7 +180,6 @@ const volatile uint8_t* const PWM_other[][3] PROGMEM = {
#endif #endif
}; };
const volatile uint8_t* const PWM_OCR[][3] PROGMEM = { const volatile uint8_t* const PWM_OCR[][3] PROGMEM = {
#ifdef TIMER0A #ifdef TIMER0A
@@ -218,7 +215,6 @@ const volatile uint8_t* const PWM_OCR[][3] PROGMEM = {
#endif #endif
}; };
#define TCCR_A(T) pgm_read_word(&PWM_other[T][0]) #define TCCR_A(T) pgm_read_word(&PWM_other[T][0])
#define TCCR_B(T) pgm_read_word(&PWM_other[T][1]) #define TCCR_B(T) pgm_read_word(&PWM_other[T][1])
#define TIMSK(T) pgm_read_word(&PWM_other[T][2]) #define TIMSK(T) pgm_read_word(&PWM_other[T][2])

9
Marlin/src/HAL/AVR/pinsDebug_Teensyduino.h
View File

@@ -22,11 +22,10 @@
#pragma once #pragma once
// //
// some of the pin mapping functions of the Teensduino extension to the Arduino IDE // Some of the pin mapping functions of the Arduino IDE Teensduino extension
// do not function the same as the other Arduino extensions // function differently from other Arduino extensions.
// //
#define TEENSYDUINO_IDE #define TEENSYDUINO_IDE
//digitalPinToTimer(pin) function works like Arduino but Timers are not defined //digitalPinToTimer(pin) function works like Arduino but Timers are not defined
@@ -48,8 +47,6 @@
#define PE 5 #define PE 5
#define PF 6 #define PF 6
#undef digitalPinToPort
const uint8_t PROGMEM digital_pin_to_port_PGM[] = { const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
PD, // 0 - PD0 - INT0 - PWM PD, // 0 - PD0 - INT0 - PWM
PD, // 1 - PD1 - INT1 - PWM PD, // 1 - PD1 - INT1 - PWM
@@ -101,7 +98,7 @@ const uint8_t PROGMEM digital_pin_to_port_PGM[] = {
PE, // 47 - PE3 (not defined in teensyduino) PE, // 47 - PE3 (not defined in teensyduino)
}; };
#define digitalPinToPort(P) ( pgm_read_byte( digital_pin_to_port_PGM + (P) ) ) #define digitalPinToPort(P) pgm_read_byte(digital_pin_to_port_PGM[P])
// digitalPinToBitMask(pin) is OK // digitalPinToBitMask(pin) is OK

1
Marlin/src/HAL/AVR/pinsDebug_plus_70.h
View File

@@ -231,7 +231,6 @@ const uint8_t PROGMEM digital_pin_to_bit_mask_PGM_plus_70[] = {
#define digitalPinToBitMask_plus_70(P) ( pgm_read_byte( digital_pin_to_bit_mask_PGM_plus_70 + (P) ) ) #define digitalPinToBitMask_plus_70(P) ( pgm_read_byte( digital_pin_to_bit_mask_PGM_plus_70 + (P) ) )
const uint8_t PROGMEM digital_pin_to_timer_PGM_plus_70[] = { const uint8_t PROGMEM digital_pin_to_timer_PGM_plus_70[] = {
// TIMERS // TIMERS
// ------------------------ // ------------------------

4
Marlin/src/HAL/AVR/timers.h
View File

@@ -1,7 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/AVR/u8g_com_HAL_AVR_sw_spi.cpp
View File

@@ -120,7 +120,6 @@ void u8g_spiSend_sw_AVR_mode_3(uint8_t val) {
U8G_ATOMIC_END(); U8G_ATOMIC_END();
} }
#if ENABLED(FYSETC_MINI_12864) #if ENABLED(FYSETC_MINI_12864)
#define SPISEND_SW_AVR u8g_spiSend_sw_AVR_mode_3 #define SPISEND_SW_AVR u8g_spiSend_sw_AVR_mode_3
#else #else

4
Marlin/src/HAL/DUE/HAL.cpp
View File

@@ -1,7 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

6
Marlin/src/HAL/DUE/HAL.h
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/DUE/MarlinSerial.cpp
View File

@@ -474,7 +474,6 @@ void MarlinSerial<Cfg>::flushTX() {
} }
} }
// If not using the USB port as serial port // If not using the USB port as serial port
#if defined(SERIAL_PORT) && SERIAL_PORT >= 0 #if defined(SERIAL_PORT) && SERIAL_PORT >= 0
template class MarlinSerial< MarlinSerialCfg<SERIAL_PORT> >; template class MarlinSerial< MarlinSerialCfg<SERIAL_PORT> >;

16
Marlin/src/HAL/DUE/MinSerial.cpp
View File

@@ -73,11 +73,17 @@ void install_min_serial() {
} }
#if DISABLED(DYNAMIC_VECTORTABLE) #if DISABLED(DYNAMIC_VECTORTABLE)
extern "C" { extern "C" {
__attribute__((naked)) void JumpHandler_ASM() { __attribute__((naked)) void JumpHandler_ASM() {
__asm__ __volatile__ ( __asm__ __volatile__ (
"b CommonHandler_ASM\n" "b CommonHandler_ASM\n"
); );
}
void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) UsageFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) MemManage_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) NMI_Handler();
} }
void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler(); void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler(); void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler();

7
Marlin/src/HAL/DUE/eeprom_flash.cpp
View File

@@ -1,10 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2016 Victor Perez victor_pv@hotmail.com * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

7
Marlin/src/HAL/DUE/eeprom_wired.cpp
View File

@@ -1,10 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2016 Victor Perez victor_pv@hotmail.com * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/DUE/fastio/G2_PWM.h
View File

@@ -49,7 +49,6 @@ extern volatile uint32_t *SODR_A, *SODR_B, *CODR_A, *CODR_B;
#define PWM_MAP_INIT_ROW(IO,ZZ) { ZZ == 'A' ? SODR_A : SODR_B, ZZ == 'A' ? CODR_A : CODR_B, 1 << _PIN(IO) } #define PWM_MAP_INIT_ROW(IO,ZZ) { ZZ == 'A' ? SODR_A : SODR_B, ZZ == 'A' ? CODR_A : CODR_B, 1 << _PIN(IO) }
#define PWM_MAP_INIT { PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_X_PIN, 'B'), \ #define PWM_MAP_INIT { PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_X_PIN, 'B'), \
PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_Y_PIN, 'B'), \ PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_Y_PIN, 'B'), \
PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_Z_PIN, 'B'), \ PWM_MAP_INIT_ROW(MOTOR_CURRENT_PWM_Z_PIN, 'B'), \

1
Marlin/src/HAL/DUE/fastio/G2_pins.h
View File

@@ -168,7 +168,6 @@ const G2_PinDescription G2_g_APinDescription[] = {
{ PIOB, PIO_PB21, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 52 { PIOB, PIO_PB21, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 52
{ PIOB, PIO_PB14, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 53 { PIOB, PIO_PB14, ID_PIOB, PIO_OUTPUT_0, PIO_DEFAULT, PIN_ATTR_DIGITAL, NO_ADC, NO_ADC, NOT_ON_PWM, NOT_ON_TIMER }, // PIN 53
// 54 .. 65 - Analog pins // 54 .. 65 - Analog pins
// ---------------------- // ----------------------
{ PIOA, PIO_PA16X1_AD7, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC0, ADC7, NOT_ON_PWM, NOT_ON_TIMER }, // AD0 { PIOA, PIO_PA16X1_AD7, ID_PIOA, PIO_INPUT, PIO_DEFAULT, PIN_ATTR_ANALOG, ADC0, ADC7, NOT_ON_PWM, NOT_ON_TIMER }, // AD0

6
Marlin/src/HAL/DUE/timers.cpp
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

5
Marlin/src/HAL/DUE/timers.h
View File

@@ -1,8 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

11
Marlin/src/HAL/DUE/usb/compiler.h
View File

@@ -142,7 +142,6 @@
*/ */
#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack()) #define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack())
/** /**
* \brief Set aligned boundary. * \brief Set aligned boundary.
*/ */
@@ -283,7 +282,6 @@ typedef double F64; //!< 64-bit floating-point number.
typedef uint32_t iram_size_t; typedef uint32_t iram_size_t;
//! @} //! @}
/*! \name Status Types /*! \name Status Types
*/ */
//! @{ //! @{
@@ -291,7 +289,6 @@ typedef bool Status_bool_t; //!< Boolean status.
typedef U8 Status_t; //!< 8-bit-coded status. typedef U8 Status_t; //!< 8-bit-coded status.
//! @} //! @}
/*! \name Aliasing Aggregate Types /*! \name Aliasing Aggregate Types
*/ */
//! @{ //! @{
@@ -462,7 +459,6 @@ typedef struct
#endif #endif
//! @} //! @}
#ifndef __ASSEMBLY__ // not for assembling. #ifndef __ASSEMBLY__ // not for assembling.
//! \name Optimization Control //! \name Optimization Control
@@ -581,7 +577,6 @@ typedef struct
//! @} //! @}
/*! \name Zero-Bit Counting /*! \name Zero-Bit Counting
* *
* Under GCC, __builtin_clz and __builtin_ctz behave like macros when * Under GCC, __builtin_clz and __builtin_ctz behave like macros when
@@ -692,7 +687,6 @@ typedef struct
//! @} //! @}
/*! \name Bit Reversing /*! \name Bit Reversing
*/ */
//! @{ //! @{
@@ -732,7 +726,6 @@ typedef struct
//! @} //! @}
/*! \name Alignment /*! \name Alignment
*/ */
//! @{ //! @{
@@ -798,7 +791,6 @@ typedef struct
*/ */
#define Long_call(addr) ((*(void (*)(void))(addr))()) #define Long_call(addr) ((*(void (*)(void))(addr))())
/*! \name MCU Endianism Handling /*! \name MCU Endianism Handling
* ARM is MCU little endianism. * ARM is MCU little endianism.
*/ */
@@ -868,7 +860,6 @@ typedef struct
#define CPU_TO_BE32(x) swap32(x) #define CPU_TO_BE32(x) swap32(x)
//! @} //! @}
/*! \name Endianism Conversion /*! \name Endianism Conversion
* *
* The same considerations as for clz and ctz apply here but GCC's * The same considerations as for clz and ctz apply here but GCC's
@@ -955,7 +946,6 @@ typedef struct
//! @} //! @}
/*! \name Target Abstraction /*! \name Target Abstraction
*/ */
//! @{ //! @{
@@ -997,7 +987,6 @@ typedef U8 Byte; //!< 8-bit unsigned integer.
#endif // #ifndef __ASSEMBLY__ #endif // #ifndef __ASSEMBLY__
#ifdef __ICCARM__ #ifdef __ICCARM__
#define SHORTENUM __packed #define SHORTENUM __packed
#elif defined(__GNUC__) #elif defined(__GNUC__)

2
Marlin/src/HAL/DUE/usb/conf_access.h
View File

@@ -81,7 +81,6 @@
#define LUN_0_NAME "\"SD/MMC Card\"" #define LUN_0_NAME "\"SD/MMC Card\""
//! @} //! @}
/*! \name Actions Associated with Memory Accesses /*! \name Actions Associated with Memory Accesses
* *
* Write here the action to associate with each memory access. * Write here the action to associate with each memory access.
@@ -112,5 +111,4 @@
#define GLOBAL_WR_PROTECT false //!< Management of a global write protection. #define GLOBAL_WR_PROTECT false //!< Management of a global write protection.
//! @} //! @}
#endif // _CONF_ACCESS_H_ #endif // _CONF_ACCESS_H_

1
Marlin/src/HAL/DUE/usb/conf_clock.h
View File

@@ -96,5 +96,4 @@
// - UPLL frequency: 480MHz // - UPLL frequency: 480MHz
// - USB clock: 480 / 1 = 480MHz // - USB clock: 480 / 1 = 480MHz
#endif /* CONF_CLOCK_H_INCLUDED */ #endif /* CONF_CLOCK_H_INCLUDED */

4
Marlin/src/HAL/DUE/usb/conf_usb.h
View File

@@ -88,7 +88,6 @@
#endif #endif
//@} //@}
/** /**
* USB Device Callbacks definitions (Optional) * USB Device Callbacks definitions (Optional)
* @{ * @{
@@ -150,7 +149,6 @@
//@} //@}
/** /**
* USB Interface Configuration * USB Interface Configuration
* @{ * @{
@@ -210,7 +208,6 @@
//@} //@}
//@} //@}
/** /**
* Configuration of MSC interface * Configuration of MSC interface
* @{ * @{
@@ -245,7 +242,6 @@
//@} //@}
/** /**
* Description of Composite Device * Description of Composite Device
* @{ * @{

28
Marlin/src/HAL/DUE/usb/ctrl_access.c
View File

@@ -68,7 +68,6 @@
#endif #endif
#include "ctrl_access.h" #include "ctrl_access.h"
//_____ D E F I N I T I O N S ______________________________________________ //_____ D E F I N I T I O N S ______________________________________________
#ifdef FREERTOS_USED #ifdef FREERTOS_USED
@@ -112,7 +111,6 @@ static xSemaphoreHandle ctrl_access_semphr = NULL;
#endif // FREERTOS_USED #endif // FREERTOS_USED
#if MAX_LUN #if MAX_LUN
/*! \brief Initializes an entry of the LUN descriptor table. /*! \brief Initializes an entry of the LUN descriptor table.
@@ -242,17 +240,14 @@ static const struct
#endif #endif
#if GLOBAL_WR_PROTECT == true #if GLOBAL_WR_PROTECT == true
bool g_wr_protect; bool g_wr_protect;
#endif #endif
/*! \name Control Interface /*! \name Control Interface
*/ */
//! @{ //! @{
#ifdef FREERTOS_USED #ifdef FREERTOS_USED
bool ctrl_access_init(void) bool ctrl_access_init(void)
@@ -270,7 +265,6 @@ bool ctrl_access_init(void)
return true; return true;
} }
/*! \brief Locks accesses to LUNs. /*! \brief Locks accesses to LUNs.
* *
* \return \c true if the access was successfully locked, else \c false. * \return \c true if the access was successfully locked, else \c false.
@@ -288,7 +282,6 @@ static bool ctrl_access_lock(void)
#endif // FREERTOS_USED #endif // FREERTOS_USED
U8 get_nb_lun(void) U8 get_nb_lun(void)
{ {
#if MEM_USB == ENABLE #if MEM_USB == ENABLE
@@ -309,13 +302,11 @@ U8 get_nb_lun(void)
#endif #endif
} }
U8 get_cur_lun(void) U8 get_cur_lun(void)
{ {
return LUN_ID_0; return LUN_ID_0;
} }
Ctrl_status mem_test_unit_ready(U8 lun) Ctrl_status mem_test_unit_ready(U8 lun)
{ {
Ctrl_status status; Ctrl_status status;
@@ -337,7 +328,6 @@ Ctrl_status mem_test_unit_ready(U8 lun)
return status; return status;
} }
Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector) Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector)
{ {
Ctrl_status status; Ctrl_status status;
@@ -359,7 +349,6 @@ Ctrl_status mem_read_capacity(U8 lun, U32 *u32_nb_sector)
return status; return status;
} }
U8 mem_sector_size(U8 lun) U8 mem_sector_size(U8 lun)
{ {
U8 sector_size; U8 sector_size;
@@ -381,7 +370,6 @@ U8 mem_sector_size(U8 lun)
return sector_size; return sector_size;
} }
bool mem_unload(U8 lun, bool unload) bool mem_unload(U8 lun, bool unload)
{ {
bool unloaded; bool unloaded;
@@ -433,7 +421,6 @@ bool mem_wr_protect(U8 lun)
return wr_protect; return wr_protect;
} }
bool mem_removal(U8 lun) bool mem_removal(U8 lun)
{ {
bool removal; bool removal;
@@ -458,7 +445,6 @@ bool mem_removal(U8 lun)
return removal; return removal;
} }
const char *mem_name(U8 lun) const char *mem_name(U8 lun)
{ {
#if MAX_LUN==0 #if MAX_LUN==0
@@ -475,17 +461,14 @@ const char *mem_name(U8 lun)
#endif #endif
} }
//! @} //! @}
#if ACCESS_USB == true #if ACCESS_USB == true
/*! \name MEM <-> USB Interface /*! \name MEM <-> USB Interface
*/ */
//! @{ //! @{
Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector) Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector)
{ {
Ctrl_status status; Ctrl_status status;
@@ -505,7 +488,6 @@ Ctrl_status memory_2_usb(U8 lun, U32 addr, U16 nb_sector)
return status; return status;
} }
Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector) Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector)
{ {
Ctrl_status status; Ctrl_status status;
@@ -525,19 +507,16 @@ Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector)
return status; return status;
} }
//! @} //! @}
#endif // ACCESS_USB == true #endif // ACCESS_USB == true
#if ACCESS_MEM_TO_RAM == true #if ACCESS_MEM_TO_RAM == true
/*! \name MEM <-> RAM Interface /*! \name MEM <-> RAM Interface
*/ */
//! @{ //! @{
Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram) Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram)
{ {
Ctrl_status status; Ctrl_status status;
@@ -564,7 +543,6 @@ Ctrl_status memory_2_ram(U8 lun, U32 addr, void *ram)
return status; return status;
} }
Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram) Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram)
{ {
Ctrl_status status; Ctrl_status status;
@@ -591,19 +569,16 @@ Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram)
return status; return status;
} }
//! @} //! @}
#endif // ACCESS_MEM_TO_RAM == true #endif // ACCESS_MEM_TO_RAM == true
#if ACCESS_STREAM == true #if ACCESS_STREAM == true
/*! \name Streaming MEM <-> MEM Interface /*! \name Streaming MEM <-> MEM Interface
*/ */
//! @{ //! @{
#if ACCESS_MEM_TO_MEM == true #if ACCESS_MEM_TO_MEM == true
#include "fat.h" #include "fat.h"
@@ -625,21 +600,18 @@ Ctrl_status stream_mem_to_mem(U8 src_lun, U32 src_addr, U8 dest_lun, U32 dest_ad
#endif // ACCESS_MEM_TO_MEM == true #endif // ACCESS_MEM_TO_MEM == true
Ctrl_status stream_state(U8 id) Ctrl_status stream_state(U8 id)
{ {
UNUSED(id); UNUSED(id);
return CTRL_GOOD; return CTRL_GOOD;
} }
U16 stream_stop(U8 id) U16 stream_stop(U8 id)
{ {
UNUSED(id); UNUSED(id);
return 0; return 0;
} }
//! @} //! @}
#endif // ACCESS_STREAM #endif // ACCESS_STREAM

9
Marlin/src/HAL/DUE/usb/ctrl_access.h
View File

@@ -56,7 +56,6 @@
* Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a> * Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a>
*/ */
#ifndef _CTRL_ACCESS_H_ #ifndef _CTRL_ACCESS_H_
#define _CTRL_ACCESS_H_ #define _CTRL_ACCESS_H_
@@ -89,7 +88,6 @@ typedef enum
CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed. CTRL_BUSY = FAIL + 2 //!< Memory not initialized or changed.
} Ctrl_status; } Ctrl_status;
// FYI: Each Logical Unit Number (LUN) corresponds to a memory. // FYI: Each Logical Unit Number (LUN) corresponds to a memory.
// Check LUN defines. // Check LUN defines.
@@ -136,7 +134,6 @@ typedef enum
#define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage). #define LUN_ID_USB (MAX_LUN) //!< First dynamic LUN (USB host mass storage).
//! @} //! @}
// Include LUN header files. // Include LUN header files.
#if LUN_0 == ENABLE #if LUN_0 == ENABLE
#include LUN_0_INCLUDE #include LUN_0_INCLUDE
@@ -166,13 +163,11 @@ typedef enum
#include LUN_USB_INCLUDE #include LUN_USB_INCLUDE
#endif #endif
// Check the configuration of write protection in conf_access.h. // Check the configuration of write protection in conf_access.h.
#ifndef GLOBAL_WR_PROTECT #ifndef GLOBAL_WR_PROTECT
#error GLOBAL_WR_PROTECT must be defined as true or false in conf_access.h #error GLOBAL_WR_PROTECT must be defined as true or false in conf_access.h
#endif #endif
#if GLOBAL_WR_PROTECT == true #if GLOBAL_WR_PROTECT == true
//! Write protect. //! Write protect.
@@ -180,7 +175,6 @@ extern bool g_wr_protect;
#endif #endif
/*! \name Control Interface /*! \name Control Interface
*/ */
//! @{ //! @{
@@ -279,7 +273,6 @@ extern const char *mem_name(U8 lun);
//! @} //! @}
#if ACCESS_USB == true #if ACCESS_USB == true
/*! \name MEM <-> USB Interface /*! \name MEM <-> USB Interface
@@ -310,7 +303,6 @@ extern Ctrl_status usb_2_memory(U8 lun, U32 addr, U16 nb_sector);
#endif // ACCESS_USB == true #endif // ACCESS_USB == true
#if ACCESS_MEM_TO_RAM == true #if ACCESS_MEM_TO_RAM == true
/*! \name MEM <-> RAM Interface /*! \name MEM <-> RAM Interface
@@ -341,7 +333,6 @@ extern Ctrl_status ram_2_memory(U8 lun, U32 addr, const void *ram);
#endif // ACCESS_MEM_TO_RAM == true #endif // ACCESS_MEM_TO_RAM == true
#if ACCESS_STREAM == true #if ACCESS_STREAM == true
/*! \name Streaming MEM <-> MEM Interface /*! \name Streaming MEM <-> MEM Interface

264
Marlin/src/HAL/DUE/usb/genclk.h
View File

@@ -74,17 +74,17 @@ extern "C" {
//@{ //@{
enum genclk_source { enum genclk_source {
GENCLK_PCK_SRC_SLCK_RC = 0, //!< Internal 32kHz RC oscillator as PCK source clock GENCLK_PCK_SRC_SLCK_RC = 0, //!< Internal 32kHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_SLCK_XTAL = 1, //!< External 32kHz crystal oscillator as PCK source clock GENCLK_PCK_SRC_SLCK_XTAL = 1, //!< External 32kHz crystal oscillator as PCK source clock
GENCLK_PCK_SRC_SLCK_BYPASS = 2, //!< External 32kHz bypass oscillator as PCK source clock GENCLK_PCK_SRC_SLCK_BYPASS = 2, //!< External 32kHz bypass oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_4M_RC = 3, //!< Internal 4MHz RC oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_4M_RC = 3, //!< Internal 4MHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_8M_RC = 4, //!< Internal 8MHz RC oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_8M_RC = 4, //!< Internal 8MHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_12M_RC = 5, //!< Internal 12MHz RC oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_XTAL = 6, //!< External crystal oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_XTAL = 6, //!< External crystal oscillator as PCK source clock
GENCLK_PCK_SRC_MAINCK_BYPASS = 7, //!< External bypass oscillator as PCK source clock GENCLK_PCK_SRC_MAINCK_BYPASS = 7, //!< External bypass oscillator as PCK source clock
GENCLK_PCK_SRC_PLLACK = 8, //!< Use PLLACK as PCK source clock GENCLK_PCK_SRC_PLLACK = 8, //!< Use PLLACK as PCK source clock
GENCLK_PCK_SRC_PLLBCK = 9, //!< Use PLLBCK as PCK source clock GENCLK_PCK_SRC_PLLBCK = 9, //!< Use PLLBCK as PCK source clock
GENCLK_PCK_SRC_MCK = 10, //!< Use Master Clk as PCK source clock GENCLK_PCK_SRC_MCK = 10, //!< Use Master Clk as PCK source clock
}; };
//@} //@}
@@ -93,176 +93,162 @@ enum genclk_source {
//@{ //@{
enum genclk_divider { enum genclk_divider {
GENCLK_PCK_PRES_1 = PMC_PCK_PRES_CLK_1, //!< Set PCK clock prescaler to 1 GENCLK_PCK_PRES_1 = PMC_PCK_PRES_CLK_1, //!< Set PCK clock prescaler to 1
GENCLK_PCK_PRES_2 = PMC_PCK_PRES_CLK_2, //!< Set PCK clock prescaler to 2 GENCLK_PCK_PRES_2 = PMC_PCK_PRES_CLK_2, //!< Set PCK clock prescaler to 2
GENCLK_PCK_PRES_4 = PMC_PCK_PRES_CLK_4, //!< Set PCK clock prescaler to 4 GENCLK_PCK_PRES_4 = PMC_PCK_PRES_CLK_4, //!< Set PCK clock prescaler to 4
GENCLK_PCK_PRES_8 = PMC_PCK_PRES_CLK_8, //!< Set PCK clock prescaler to 8 GENCLK_PCK_PRES_8 = PMC_PCK_PRES_CLK_8, //!< Set PCK clock prescaler to 8
GENCLK_PCK_PRES_16 = PMC_PCK_PRES_CLK_16, //!< Set PCK clock prescaler to 16 GENCLK_PCK_PRES_16 = PMC_PCK_PRES_CLK_16, //!< Set PCK clock prescaler to 16
GENCLK_PCK_PRES_32 = PMC_PCK_PRES_CLK_32, //!< Set PCK clock prescaler to 32 GENCLK_PCK_PRES_32 = PMC_PCK_PRES_CLK_32, //!< Set PCK clock prescaler to 32
GENCLK_PCK_PRES_64 = PMC_PCK_PRES_CLK_64, //!< Set PCK clock prescaler to 64 GENCLK_PCK_PRES_64 = PMC_PCK_PRES_CLK_64, //!< Set PCK clock prescaler to 64
}; };
//@} //@}
struct genclk_config { struct genclk_config {
uint32_t ctrl; uint32_t ctrl;
}; };
static inline void genclk_config_defaults(struct genclk_config *p_cfg, static inline void genclk_config_defaults(struct genclk_config *p_cfg, uint32_t ul_id) {
uint32_t ul_id) ul_id = ul_id;
{ p_cfg->ctrl = 0;
ul_id = ul_id;
p_cfg->ctrl = 0;
} }
static inline void genclk_config_read(struct genclk_config *p_cfg, static inline void genclk_config_read(struct genclk_config *p_cfg, uint32_t ul_id) {
uint32_t ul_id) p_cfg->ctrl = PMC->PMC_PCK[ul_id];
{
p_cfg->ctrl = PMC->PMC_PCK[ul_id];
} }
static inline void genclk_config_write(const struct genclk_config *p_cfg, static inline void genclk_config_write(const struct genclk_config *p_cfg, uint32_t ul_id) {
uint32_t ul_id) PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
{
PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
} }
//! \name Programmable Clock Source and Prescaler configuration //! \name Programmable Clock Source and Prescaler configuration
//@{ //@{
static inline void genclk_config_set_source(struct genclk_config *p_cfg, static inline void genclk_config_set_source(struct genclk_config *p_cfg, enum genclk_source e_src) {
enum genclk_source e_src) p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
{
p_cfg->ctrl &= (~PMC_PCK_CSS_Msk);
switch (e_src) { switch (e_src) {
case GENCLK_PCK_SRC_SLCK_RC: case GENCLK_PCK_SRC_SLCK_RC:
case GENCLK_PCK_SRC_SLCK_XTAL: case GENCLK_PCK_SRC_SLCK_XTAL:
case GENCLK_PCK_SRC_SLCK_BYPASS: case GENCLK_PCK_SRC_SLCK_BYPASS:
p_cfg->ctrl |= (PMC_PCK_CSS_SLOW_CLK); p_cfg->ctrl |= (PMC_PCK_CSS_SLOW_CLK);
break; break;
case GENCLK_PCK_SRC_MAINCK_4M_RC: case GENCLK_PCK_SRC_MAINCK_4M_RC:
case GENCLK_PCK_SRC_MAINCK_8M_RC: case GENCLK_PCK_SRC_MAINCK_8M_RC:
case GENCLK_PCK_SRC_MAINCK_12M_RC: case GENCLK_PCK_SRC_MAINCK_12M_RC:
case GENCLK_PCK_SRC_MAINCK_XTAL: case GENCLK_PCK_SRC_MAINCK_XTAL:
case GENCLK_PCK_SRC_MAINCK_BYPASS: case GENCLK_PCK_SRC_MAINCK_BYPASS:
p_cfg->ctrl |= (PMC_PCK_CSS_MAIN_CLK); p_cfg->ctrl |= (PMC_PCK_CSS_MAIN_CLK);
break; break;
case GENCLK_PCK_SRC_PLLACK: case GENCLK_PCK_SRC_PLLACK:
p_cfg->ctrl |= (PMC_PCK_CSS_PLLA_CLK); p_cfg->ctrl |= (PMC_PCK_CSS_PLLA_CLK);
break; break;
case GENCLK_PCK_SRC_PLLBCK: case GENCLK_PCK_SRC_PLLBCK:
p_cfg->ctrl |= (PMC_PCK_CSS_UPLL_CLK); p_cfg->ctrl |= (PMC_PCK_CSS_UPLL_CLK);
break; break;
case GENCLK_PCK_SRC_MCK: case GENCLK_PCK_SRC_MCK:
p_cfg->ctrl |= (PMC_PCK_CSS_MCK); p_cfg->ctrl |= (PMC_PCK_CSS_MCK);
break; break;
} }
} }
static inline void genclk_config_set_divider(struct genclk_config *p_cfg, static inline void genclk_config_set_divider(struct genclk_config *p_cfg, uint32_t e_divider) {
uint32_t e_divider) p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
{ p_cfg->ctrl |= e_divider;
p_cfg->ctrl &= ~PMC_PCK_PRES_Msk;
p_cfg->ctrl |= e_divider;
} }
//@} //@}
static inline void genclk_enable(const struct genclk_config *p_cfg, static inline void genclk_enable(const struct genclk_config *p_cfg, uint32_t ul_id) {
uint32_t ul_id) PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
{ pmc_enable_pck(ul_id);
PMC->PMC_PCK[ul_id] = p_cfg->ctrl;
pmc_enable_pck(ul_id);
} }
static inline void genclk_disable(uint32_t ul_id) static inline void genclk_disable(uint32_t ul_id) {
{ pmc_disable_pck(ul_id);
pmc_disable_pck(ul_id);
} }
static inline void genclk_enable_source(enum genclk_source e_src) static inline void genclk_enable_source(enum genclk_source e_src) {
{ switch (e_src) {
switch (e_src) { case GENCLK_PCK_SRC_SLCK_RC:
case GENCLK_PCK_SRC_SLCK_RC: if (!osc_is_ready(OSC_SLCK_32K_RC)) {
if (!osc_is_ready(OSC_SLCK_32K_RC)) { osc_enable(OSC_SLCK_32K_RC);
osc_enable(OSC_SLCK_32K_RC); osc_wait_ready(OSC_SLCK_32K_RC);
osc_wait_ready(OSC_SLCK_32K_RC); }
} break;
break;
case GENCLK_PCK_SRC_SLCK_XTAL: case GENCLK_PCK_SRC_SLCK_XTAL:
if (!osc_is_ready(OSC_SLCK_32K_XTAL)) { if (!osc_is_ready(OSC_SLCK_32K_XTAL)) {
osc_enable(OSC_SLCK_32K_XTAL); osc_enable(OSC_SLCK_32K_XTAL);
osc_wait_ready(OSC_SLCK_32K_XTAL); osc_wait_ready(OSC_SLCK_32K_XTAL);
} }
break; break;
case GENCLK_PCK_SRC_SLCK_BYPASS: case GENCLK_PCK_SRC_SLCK_BYPASS:
if (!osc_is_ready(OSC_SLCK_32K_BYPASS)) { if (!osc_is_ready(OSC_SLCK_32K_BYPASS)) {
osc_enable(OSC_SLCK_32K_BYPASS); osc_enable(OSC_SLCK_32K_BYPASS);
osc_wait_ready(OSC_SLCK_32K_BYPASS); osc_wait_ready(OSC_SLCK_32K_BYPASS);
} }
break; break;
case GENCLK_PCK_SRC_MAINCK_4M_RC: case GENCLK_PCK_SRC_MAINCK_4M_RC:
if (!osc_is_ready(OSC_MAINCK_4M_RC)) { if (!osc_is_ready(OSC_MAINCK_4M_RC)) {
osc_enable(OSC_MAINCK_4M_RC); osc_enable(OSC_MAINCK_4M_RC);
osc_wait_ready(OSC_MAINCK_4M_RC); osc_wait_ready(OSC_MAINCK_4M_RC);
} }
break; break;
case GENCLK_PCK_SRC_MAINCK_8M_RC: case GENCLK_PCK_SRC_MAINCK_8M_RC:
if (!osc_is_ready(OSC_MAINCK_8M_RC)) { if (!osc_is_ready(OSC_MAINCK_8M_RC)) {
osc_enable(OSC_MAINCK_8M_RC); osc_enable(OSC_MAINCK_8M_RC);
osc_wait_ready(OSC_MAINCK_8M_RC); osc_wait_ready(OSC_MAINCK_8M_RC);
} }
break; break;
case GENCLK_PCK_SRC_MAINCK_12M_RC: case GENCLK_PCK_SRC_MAINCK_12M_RC:
if (!osc_is_ready(OSC_MAINCK_12M_RC)) { if (!osc_is_ready(OSC_MAINCK_12M_RC)) {
osc_enable(OSC_MAINCK_12M_RC); osc_enable(OSC_MAINCK_12M_RC);
osc_wait_ready(OSC_MAINCK_12M_RC); osc_wait_ready(OSC_MAINCK_12M_RC);
} }
break; break;
case GENCLK_PCK_SRC_MAINCK_XTAL: case GENCLK_PCK_SRC_MAINCK_XTAL:
if (!osc_is_ready(OSC_MAINCK_XTAL)) { if (!osc_is_ready(OSC_MAINCK_XTAL)) {
osc_enable(OSC_MAINCK_XTAL); osc_enable(OSC_MAINCK_XTAL);
osc_wait_ready(OSC_MAINCK_XTAL); osc_wait_ready(OSC_MAINCK_XTAL);
} }
break; break;
case GENCLK_PCK_SRC_MAINCK_BYPASS: case GENCLK_PCK_SRC_MAINCK_BYPASS:
if (!osc_is_ready(OSC_MAINCK_BYPASS)) { if (!osc_is_ready(OSC_MAINCK_BYPASS)) {
osc_enable(OSC_MAINCK_BYPASS); osc_enable(OSC_MAINCK_BYPASS);
osc_wait_ready(OSC_MAINCK_BYPASS); osc_wait_ready(OSC_MAINCK_BYPASS);
} }
break; break;
#ifdef CONFIG_PLL0_SOURCE #ifdef CONFIG_PLL0_SOURCE
case GENCLK_PCK_SRC_PLLACK: case GENCLK_PCK_SRC_PLLACK:
pll_enable_config_defaults(0); pll_enable_config_defaults(0);
break; break;
#endif #endif
#ifdef CONFIG_PLL1_SOURCE #ifdef CONFIG_PLL1_SOURCE
case GENCLK_PCK_SRC_PLLBCK: case GENCLK_PCK_SRC_PLLBCK:
pll_enable_config_defaults(1); pll_enable_config_defaults(1);
break; break;
#endif #endif
case GENCLK_PCK_SRC_MCK: case GENCLK_PCK_SRC_MCK:
break; break;
default: default:
Assert(false); Assert(false);
break; break;
} }
} }
//! @} //! @}

1
Marlin/src/HAL/DUE/usb/mrepeat.h
View File

@@ -57,7 +57,6 @@
#include "preprocessor.h" #include "preprocessor.h"
//! Maximal number of repetitions supported by MREPEAT. //! Maximal number of repetitions supported by MREPEAT.
#define MREPEAT_LIMIT 256 #define MREPEAT_LIMIT 256

201
Marlin/src/HAL/DUE/usb/osc.h
View File

@@ -62,28 +62,28 @@ extern "C" {
* should be defined by the board code, otherwise default value are used. * should be defined by the board code, otherwise default value are used.
*/ */
#ifndef BOARD_FREQ_SLCK_XTAL #ifndef BOARD_FREQ_SLCK_XTAL
# warning The board slow clock xtal frequency has not been defined. #warning The board slow clock xtal frequency has not been defined.
# define BOARD_FREQ_SLCK_XTAL (32768UL) #define BOARD_FREQ_SLCK_XTAL (32768UL)
#endif #endif
#ifndef BOARD_FREQ_SLCK_BYPASS #ifndef BOARD_FREQ_SLCK_BYPASS
# warning The board slow clock bypass frequency has not been defined. #warning The board slow clock bypass frequency has not been defined.
# define BOARD_FREQ_SLCK_BYPASS (32768UL) #define BOARD_FREQ_SLCK_BYPASS (32768UL)
#endif #endif
#ifndef BOARD_FREQ_MAINCK_XTAL #ifndef BOARD_FREQ_MAINCK_XTAL
# warning The board main clock xtal frequency has not been defined. #warning The board main clock xtal frequency has not been defined.
# define BOARD_FREQ_MAINCK_XTAL (12000000UL) #define BOARD_FREQ_MAINCK_XTAL (12000000UL)
#endif #endif
#ifndef BOARD_FREQ_MAINCK_BYPASS #ifndef BOARD_FREQ_MAINCK_BYPASS
# warning The board main clock bypass frequency has not been defined. #warning The board main clock bypass frequency has not been defined.
# define BOARD_FREQ_MAINCK_BYPASS (12000000UL) #define BOARD_FREQ_MAINCK_BYPASS (12000000UL)
#endif #endif
#ifndef BOARD_OSC_STARTUP_US #ifndef BOARD_OSC_STARTUP_US
# warning The board main clock xtal startup time has not been defined. #warning The board main clock xtal startup time has not been defined.
# define BOARD_OSC_STARTUP_US (15625UL) #define BOARD_OSC_STARTUP_US (15625UL)
#endif #endif
/** /**
@@ -115,122 +115,116 @@ extern "C" {
#define OSC_MAINCK_BYPASS_HZ BOARD_FREQ_MAINCK_BYPASS //!< External bypass oscillator. #define OSC_MAINCK_BYPASS_HZ BOARD_FREQ_MAINCK_BYPASS //!< External bypass oscillator.
//@} //@}
static inline void osc_enable(uint32_t ul_id) static inline void osc_enable(uint32_t ul_id) {
{ switch (ul_id) {
switch (ul_id) { case OSC_SLCK_32K_RC:
case OSC_SLCK_32K_RC: break;
break;
case OSC_SLCK_32K_XTAL: case OSC_SLCK_32K_XTAL:
pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL); pmc_switch_sclk_to_32kxtal(PMC_OSC_XTAL);
break; break;
case OSC_SLCK_32K_BYPASS: case OSC_SLCK_32K_BYPASS:
pmc_switch_sclk_to_32kxtal(PMC_OSC_BYPASS); pmc_switch_sclk_to_32kxtal(PMC_OSC_BYPASS);
break; break;
case OSC_MAINCK_4M_RC:
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz);
break;
case OSC_MAINCK_4M_RC: case OSC_MAINCK_8M_RC:
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_4_MHz); pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz);
break; break;
case OSC_MAINCK_8M_RC: case OSC_MAINCK_12M_RC:
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_8_MHz); pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz);
break; break;
case OSC_MAINCK_12M_RC: case OSC_MAINCK_XTAL:
pmc_switch_mainck_to_fastrc(CKGR_MOR_MOSCRCF_12_MHz); pmc_switch_mainck_to_xtal(PMC_OSC_XTAL/*,
break; pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
OSC_SLCK_32K_RC_HZ)*/);
break;
case OSC_MAINCK_BYPASS:
case OSC_MAINCK_XTAL: pmc_switch_mainck_to_xtal(PMC_OSC_BYPASS/*,
pmc_switch_mainck_to_xtal(PMC_OSC_XTAL/*, pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US, OSC_SLCK_32K_RC_HZ)*/);
OSC_SLCK_32K_RC_HZ)*/); break;
break; }
case OSC_MAINCK_BYPASS:
pmc_switch_mainck_to_xtal(PMC_OSC_BYPASS/*,
pmc_us_to_moscxtst(BOARD_OSC_STARTUP_US,
OSC_SLCK_32K_RC_HZ)*/);
break;
}
} }
static inline void osc_disable(uint32_t ul_id) static inline void osc_disable(uint32_t ul_id) {
{ switch (ul_id) {
switch (ul_id) { case OSC_SLCK_32K_RC:
case OSC_SLCK_32K_RC: case OSC_SLCK_32K_XTAL:
case OSC_SLCK_32K_XTAL: case OSC_SLCK_32K_BYPASS:
case OSC_SLCK_32K_BYPASS: break;
break;
case OSC_MAINCK_4M_RC: case OSC_MAINCK_4M_RC:
case OSC_MAINCK_8M_RC: case OSC_MAINCK_8M_RC:
case OSC_MAINCK_12M_RC: case OSC_MAINCK_12M_RC:
pmc_osc_disable_fastrc(); pmc_osc_disable_fastrc();
break; break;
case OSC_MAINCK_XTAL: case OSC_MAINCK_XTAL:
pmc_osc_disable_xtal(PMC_OSC_XTAL); pmc_osc_disable_xtal(PMC_OSC_XTAL);
break; break;
case OSC_MAINCK_BYPASS: case OSC_MAINCK_BYPASS:
pmc_osc_disable_xtal(PMC_OSC_BYPASS); pmc_osc_disable_xtal(PMC_OSC_BYPASS);
break; break;
} }
} }
static inline bool osc_is_ready(uint32_t ul_id) static inline bool osc_is_ready(uint32_t ul_id) {
{ switch (ul_id) {
switch (ul_id) { case OSC_SLCK_32K_RC:
case OSC_SLCK_32K_RC: return 1;
return 1;
case OSC_SLCK_32K_XTAL: case OSC_SLCK_32K_XTAL:
case OSC_SLCK_32K_BYPASS: case OSC_SLCK_32K_BYPASS:
return pmc_osc_is_ready_32kxtal(); return pmc_osc_is_ready_32kxtal();
case OSC_MAINCK_4M_RC: case OSC_MAINCK_4M_RC:
case OSC_MAINCK_8M_RC: case OSC_MAINCK_8M_RC:
case OSC_MAINCK_12M_RC: case OSC_MAINCK_12M_RC:
case OSC_MAINCK_XTAL: case OSC_MAINCK_XTAL:
case OSC_MAINCK_BYPASS: case OSC_MAINCK_BYPASS:
return pmc_osc_is_ready_mainck(); return pmc_osc_is_ready_mainck();
} }
return 0; return 0;
} }
static inline uint32_t osc_get_rate(uint32_t ul_id) static inline uint32_t osc_get_rate(uint32_t ul_id) {
{ switch (ul_id) {
switch (ul_id) { case OSC_SLCK_32K_RC:
case OSC_SLCK_32K_RC: return OSC_SLCK_32K_RC_HZ;
return OSC_SLCK_32K_RC_HZ;
case OSC_SLCK_32K_XTAL: case OSC_SLCK_32K_XTAL:
return BOARD_FREQ_SLCK_XTAL; return BOARD_FREQ_SLCK_XTAL;
case OSC_SLCK_32K_BYPASS: case OSC_SLCK_32K_BYPASS:
return BOARD_FREQ_SLCK_BYPASS; return BOARD_FREQ_SLCK_BYPASS;
case OSC_MAINCK_4M_RC: case OSC_MAINCK_4M_RC:
return OSC_MAINCK_4M_RC_HZ; return OSC_MAINCK_4M_RC_HZ;
case OSC_MAINCK_8M_RC: case OSC_MAINCK_8M_RC:
return OSC_MAINCK_8M_RC_HZ; return OSC_MAINCK_8M_RC_HZ;
case OSC_MAINCK_12M_RC: case OSC_MAINCK_12M_RC:
return OSC_MAINCK_12M_RC_HZ; return OSC_MAINCK_12M_RC_HZ;
case OSC_MAINCK_XTAL: case OSC_MAINCK_XTAL:
return BOARD_FREQ_MAINCK_XTAL; return BOARD_FREQ_MAINCK_XTAL;
case OSC_MAINCK_BYPASS: case OSC_MAINCK_BYPASS:
return BOARD_FREQ_MAINCK_BYPASS; return BOARD_FREQ_MAINCK_BYPASS;
} }
return 0; return 0;
} }
/** /**
@@ -241,11 +235,10 @@ static inline uint32_t osc_get_rate(uint32_t ul_id)
* *
* \param id A number identifying the oscillator to wait for. * \param id A number identifying the oscillator to wait for.
*/ */
static inline void osc_wait_ready(uint8_t id) static inline void osc_wait_ready(uint8_t id) {
{ while (!osc_is_ready(id)) {
while (!osc_is_ready(id)) { /* Do nothing */
/* Do nothing */ }
}
} }
//! @} //! @}

238
Marlin/src/HAL/DUE/usb/pll.h
View File

@@ -77,22 +77,22 @@ extern "C" {
#define PLL_COUNT 0x3FU #define PLL_COUNT 0x3FU
enum pll_source { enum pll_source {
PLL_SRC_MAINCK_4M_RC = OSC_MAINCK_4M_RC, //!< Internal 4MHz RC oscillator. PLL_SRC_MAINCK_4M_RC = OSC_MAINCK_4M_RC, //!< Internal 4MHz RC oscillator.
PLL_SRC_MAINCK_8M_RC = OSC_MAINCK_8M_RC, //!< Internal 8MHz RC oscillator. PLL_SRC_MAINCK_8M_RC = OSC_MAINCK_8M_RC, //!< Internal 8MHz RC oscillator.
PLL_SRC_MAINCK_12M_RC = OSC_MAINCK_12M_RC, //!< Internal 12MHz RC oscillator. PLL_SRC_MAINCK_12M_RC = OSC_MAINCK_12M_RC, //!< Internal 12MHz RC oscillator.
PLL_SRC_MAINCK_XTAL = OSC_MAINCK_XTAL, //!< External crystal oscillator. PLL_SRC_MAINCK_XTAL = OSC_MAINCK_XTAL, //!< External crystal oscillator.
PLL_SRC_MAINCK_BYPASS = OSC_MAINCK_BYPASS, //!< External bypass oscillator. PLL_SRC_MAINCK_BYPASS = OSC_MAINCK_BYPASS, //!< External bypass oscillator.
PLL_NR_SOURCES, //!< Number of PLL sources. PLL_NR_SOURCES, //!< Number of PLL sources.
}; };
struct pll_config { struct pll_config {
uint32_t ctrl; uint32_t ctrl;
}; };
#define pll_get_default_rate(pll_id) \ #define pll_get_default_rate(pll_id) \
((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \ ((osc_get_rate(CONFIG_PLL##pll_id##_SOURCE) \
* CONFIG_PLL##pll_id##_MUL) \ * CONFIG_PLL##pll_id##_MUL) \
/ CONFIG_PLL##pll_id##_DIV) / CONFIG_PLL##pll_id##_DIV)
/* Force UTMI PLL parameters (Hardware defined) */ /* Force UTMI PLL parameters (Hardware defined) */
#ifdef CONFIG_PLL1_SOURCE #ifdef CONFIG_PLL1_SOURCE
@@ -113,145 +113,130 @@ struct pll_config {
* is hidden in this implementation. Use mul as mul effective value. * is hidden in this implementation. Use mul as mul effective value.
*/ */
static inline void pll_config_init(struct pll_config *p_cfg, static inline void pll_config_init(struct pll_config *p_cfg,
enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul) enum pll_source e_src, uint32_t ul_div, uint32_t ul_mul) {
{ uint32_t vco_hz;
uint32_t vco_hz;
Assert(e_src < PLL_NR_SOURCES); Assert(e_src < PLL_NR_SOURCES);
if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */ if (ul_div == 0 && ul_mul == 0) { /* Must only be true for UTMI PLL */
p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT); p_cfg->ctrl = CKGR_UCKR_UPLLCOUNT(PLL_COUNT);
} else { /* PLLA */ }
/* Calculate internal VCO frequency */ else { /* PLLA */
vco_hz = osc_get_rate(e_src) / ul_div; /* Calculate internal VCO frequency */
Assert(vco_hz >= PLL_INPUT_MIN_HZ); vco_hz = osc_get_rate(e_src) / ul_div;
Assert(vco_hz <= PLL_INPUT_MAX_HZ); Assert(vco_hz >= PLL_INPUT_MIN_HZ);
Assert(vco_hz <= PLL_INPUT_MAX_HZ);
vco_hz *= ul_mul; vco_hz *= ul_mul;
Assert(vco_hz >= PLL_OUTPUT_MIN_HZ); Assert(vco_hz >= PLL_OUTPUT_MIN_HZ);
Assert(vco_hz <= PLL_OUTPUT_MAX_HZ); Assert(vco_hz <= PLL_OUTPUT_MAX_HZ);
/* PMC hardware will automatically make it mul+1 */ /* PMC hardware will automatically make it mul+1 */
p_cfg->ctrl = CKGR_PLLAR_MULA(ul_mul - 1) | CKGR_PLLAR_DIVA(ul_div) | CKGR_PLLAR_PLLACOUNT(PLL_COUNT); p_cfg->ctrl = CKGR_PLLAR_MULA(ul_mul - 1) | CKGR_PLLAR_DIVA(ul_div) | CKGR_PLLAR_PLLACOUNT(PLL_COUNT);
} }
} }
#define pll_config_defaults(cfg, pll_id) \ #define pll_config_defaults(cfg, pll_id) \
pll_config_init(cfg, \ pll_config_init(cfg, \
CONFIG_PLL##pll_id##_SOURCE, \ CONFIG_PLL##pll_id##_SOURCE, \
CONFIG_PLL##pll_id##_DIV, \ CONFIG_PLL##pll_id##_DIV, \
CONFIG_PLL##pll_id##_MUL) CONFIG_PLL##pll_id##_MUL)
static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id) static inline void pll_config_read(struct pll_config *p_cfg, uint32_t ul_pll_id) {
{ Assert(ul_pll_id < NR_PLLS);
Assert(ul_pll_id < NR_PLLS); p_cfg->ctrl = ul_pll_id == PLLA_ID ? PMC->CKGR_PLLAR : PMC->CKGR_UCKR;
if (ul_pll_id == PLLA_ID) {
p_cfg->ctrl = PMC->CKGR_PLLAR;
} else {
p_cfg->ctrl = PMC->CKGR_UCKR;
}
} }
static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id) static inline void pll_config_write(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
{ Assert(ul_pll_id < NR_PLLS);
Assert(ul_pll_id < NR_PLLS);
if (ul_pll_id == PLLA_ID) { if (ul_pll_id == PLLA_ID) {
pmc_disable_pllack(); // Always stop PLL first! pmc_disable_pllack(); // Always stop PLL first!
PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl; PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
} else { }
PMC->CKGR_UCKR = p_cfg->ctrl; else
} PMC->CKGR_UCKR = p_cfg->ctrl;
} }
static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id) static inline void pll_enable(const struct pll_config *p_cfg, uint32_t ul_pll_id) {
{ Assert(ul_pll_id < NR_PLLS);
Assert(ul_pll_id < NR_PLLS);
if (ul_pll_id == PLLA_ID) { if (ul_pll_id == PLLA_ID) {
pmc_disable_pllack(); // Always stop PLL first! pmc_disable_pllack(); // Always stop PLL first!
PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl; PMC->CKGR_PLLAR = CKGR_PLLAR_ONE | p_cfg->ctrl;
} else { }
PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN; else
} PMC->CKGR_UCKR = p_cfg->ctrl | CKGR_UCKR_UPLLEN;
} }
/** /**
* \note This will only disable the selected PLL, not the underlying oscillator (mainck). * \note This will only disable the selected PLL, not the underlying oscillator (mainck).
*/ */
static inline void pll_disable(uint32_t ul_pll_id) static inline void pll_disable(uint32_t ul_pll_id) {
{ Assert(ul_pll_id < NR_PLLS);
Assert(ul_pll_id < NR_PLLS);
if (ul_pll_id == PLLA_ID) { if (ul_pll_id == PLLA_ID)
pmc_disable_pllack(); pmc_disable_pllack();
} else { else
PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN; PMC->CKGR_UCKR &= ~CKGR_UCKR_UPLLEN;
}
} }
static inline uint32_t pll_is_locked(uint32_t ul_pll_id) static inline uint32_t pll_is_locked(uint32_t ul_pll_id) {
{ Assert(ul_pll_id < NR_PLLS);
Assert(ul_pll_id < NR_PLLS);
if (ul_pll_id == PLLA_ID) { if (ul_pll_id == PLLA_ID)
return pmc_is_locked_pllack(); return pmc_is_locked_pllack();
} else { else
return pmc_is_locked_upll(); return pmc_is_locked_upll();
}
} }
static inline void pll_enable_source(enum pll_source e_src) static inline void pll_enable_source(enum pll_source e_src) {
{ switch (e_src) {
switch (e_src) { case PLL_SRC_MAINCK_4M_RC:
case PLL_SRC_MAINCK_4M_RC: case PLL_SRC_MAINCK_8M_RC:
case PLL_SRC_MAINCK_8M_RC: case PLL_SRC_MAINCK_12M_RC:
case PLL_SRC_MAINCK_12M_RC: case PLL_SRC_MAINCK_XTAL:
case PLL_SRC_MAINCK_XTAL: case PLL_SRC_MAINCK_BYPASS:
case PLL_SRC_MAINCK_BYPASS: osc_enable(e_src);
osc_enable(e_src); osc_wait_ready(e_src);
osc_wait_ready(e_src); break;
break;
default: default:
Assert(false); Assert(false);
break; break;
} }
} }
static inline void pll_enable_config_defaults(unsigned int ul_pll_id) static inline void pll_enable_config_defaults(unsigned int ul_pll_id) {
{ struct pll_config pllcfg;
struct pll_config pllcfg;
if (pll_is_locked(ul_pll_id)) { if (pll_is_locked(ul_pll_id)) return; // Pll already running
return; // Pll already running
} switch (ul_pll_id) {
switch (ul_pll_id) { #ifdef CONFIG_PLL0_SOURCE
#ifdef CONFIG_PLL0_SOURCE case 0:
case 0: pll_enable_source(CONFIG_PLL0_SOURCE);
pll_enable_source(CONFIG_PLL0_SOURCE); pll_config_init(&pllcfg,
pll_config_init(&pllcfg, CONFIG_PLL0_SOURCE,
CONFIG_PLL0_SOURCE, CONFIG_PLL0_DIV,
CONFIG_PLL0_DIV, CONFIG_PLL0_MUL);
CONFIG_PLL0_MUL); break;
break; #endif
#endif #ifdef CONFIG_PLL1_SOURCE
#ifdef CONFIG_PLL1_SOURCE case 1:
case 1: pll_enable_source(CONFIG_PLL1_SOURCE);
pll_enable_source(CONFIG_PLL1_SOURCE); pll_config_init(&pllcfg,
pll_config_init(&pllcfg, CONFIG_PLL1_SOURCE,
CONFIG_PLL1_SOURCE, CONFIG_PLL1_DIV,
CONFIG_PLL1_DIV, CONFIG_PLL1_MUL);
CONFIG_PLL1_MUL); break;
break; #endif
#endif default:
default: Assert(false);
Assert(false); break;
break; }
} pll_enable(&pllcfg, ul_pll_id);
pll_enable(&pllcfg, ul_pll_id); while (!pll_is_locked(ul_pll_id));
while (!pll_is_locked(ul_pll_id));
} }
/** /**
@@ -264,15 +249,12 @@ static inline void pll_enable_config_defaults(unsigned int ul_pll_id)
* \retval STATUS_OK The PLL is now locked. * \retval STATUS_OK The PLL is now locked.
* \retval ERR_TIMEOUT Timed out waiting for PLL to become locked. * \retval ERR_TIMEOUT Timed out waiting for PLL to become locked.
*/ */
static inline int pll_wait_for_lock(unsigned int pll_id) static inline int pll_wait_for_lock(unsigned int pll_id) {
{ Assert(pll_id < NR_PLLS);
Assert(pll_id < NR_PLLS);
while (!pll_is_locked(pll_id)) { while (!pll_is_locked(pll_id)) { /* Do nothing */ }
/* Do nothing */
}
return 0; return 0;
} }
//! @} //! @}

1
Marlin/src/HAL/DUE/usb/preprocessor.h
View File

@@ -51,5 +51,4 @@
#include "stringz.h" #include "stringz.h"
#include "mrepeat.h" #include "mrepeat.h"
#endif // _PREPROCESSOR_H_ #endif // _PREPROCESSOR_H_

112
Marlin/src/HAL/DUE/usb/sbc_protocol.h
View File

@@ -57,7 +57,6 @@
#ifndef _SBC_PROTOCOL_H_ #ifndef _SBC_PROTOCOL_H_
#define _SBC_PROTOCOL_H_ #define _SBC_PROTOCOL_H_
/** /**
* \ingroup usb_msc_protocol * \ingroup usb_msc_protocol
* \defgroup usb_sbc_protocol SCSI Block Commands protocol definitions * \defgroup usb_sbc_protocol SCSI Block Commands protocol definitions
@@ -81,82 +80,81 @@
//@{ //@{
enum scsi_sbc_mode { enum scsi_sbc_mode {
SCSI_MS_MODE_RW_ERR_RECOV = 0x01, //!< Read-Write Error Recovery mode page SCSI_MS_MODE_RW_ERR_RECOV = 0x01, //!< Read-Write Error Recovery mode page
SCSI_MS_MODE_FORMAT_DEVICE = 0x03, //!< Format Device mode page SCSI_MS_MODE_FORMAT_DEVICE = 0x03, //!< Format Device mode page
SCSI_MS_MODE_FLEXIBLE_DISK = 0x05, //!< Flexible Disk mode page SCSI_MS_MODE_FLEXIBLE_DISK = 0x05, //!< Flexible Disk mode page
SCSI_MS_MODE_CACHING = 0x08, //!< Caching mode page SCSI_MS_MODE_CACHING = 0x08, //!< Caching mode page
}; };
//! \name SBC-2 Device-Specific Parameter //! \name SBC-2 Device-Specific Parameter
//@{ //@{
#define SCSI_MS_SBC_WP 0x80 //!< Write Protected #define SCSI_MS_SBC_WP 0x80 //!< Write Protected
#define SCSI_MS_SBC_DPOFUA 0x10 //!< DPO and FUA supported #define SCSI_MS_SBC_DPOFUA 0x10 //!< DPO and FUA supported
//@} //@}
/** /**
* \brief SBC-2 Short LBA mode parameter block descriptor * \brief SBC-2 Short LBA mode parameter block descriptor
*/ */
struct sbc_slba_block_desc { struct sbc_slba_block_desc {
be32_t nr_blocks; //!< Number of Blocks be32_t nr_blocks; //!< Number of Blocks
be32_t block_len; //!< Block Length be32_t block_len; //!< Block Length
#define SBC_SLBA_BLOCK_LEN_MASK 0x00FFFFFFU //!< Mask reserved bits #define SBC_SLBA_BLOCK_LEN_MASK 0x00FFFFFFU //!< Mask reserved bits
}; };
/** /**
* \brief SBC-2 Caching mode page * \brief SBC-2 Caching mode page
*/ */
struct sbc_caching_mode_page { struct sbc_caching_mode_page {
uint8_t page_code; uint8_t page_code;
uint8_t page_length; uint8_t page_length;
uint8_t flags2; uint8_t flags2;
#define SBC_MP_CACHE_IC (1 << 7) //!< Initiator Control #define SBC_MP_CACHE_IC (1 << 7) //!< Initiator Control
#define SBC_MP_CACHE_ABPF (1 << 6) //!< Abort Pre-Fetch #define SBC_MP_CACHE_ABPF (1 << 6) //!< Abort Pre-Fetch
#define SBC_MP_CACHE_CAP (1 << 5) //!< Catching Analysis Permitted #define SBC_MP_CACHE_CAP (1 << 5) //!< Catching Analysis Permitted
#define SBC_MP_CACHE_DISC (1 << 4) //!< Discontinuity #define SBC_MP_CACHE_DISC (1 << 4) //!< Discontinuity
#define SBC_MP_CACHE_SIZE (1 << 3) //!< Size enable #define SBC_MP_CACHE_SIZE (1 << 3) //!< Size enable
#define SBC_MP_CACHE_WCE (1 << 2) //!< Write back Cache Enable #define SBC_MP_CACHE_WCE (1 << 2) //!< Write back Cache Enable
#define SBC_MP_CACHE_MF (1 << 1) //!< Multiplication Factor #define SBC_MP_CACHE_MF (1 << 1) //!< Multiplication Factor
#define SBC_MP_CACHE_RCD (1 << 0) //!< Read Cache Disable #define SBC_MP_CACHE_RCD (1 << 0) //!< Read Cache Disable
uint8_t retention; uint8_t retention;
be16_t dis_pf_transfer_len; be16_t dis_pf_transfer_len;
be16_t min_prefetch; be16_t min_prefetch;
be16_t max_prefetch; be16_t max_prefetch;
be16_t max_prefetch_ceil; be16_t max_prefetch_ceil;
uint8_t flags12; uint8_t flags12;
#define SBC_MP_CACHE_FSW (1 << 7) //!< Force Sequential Write #define SBC_MP_CACHE_FSW (1 << 7) //!< Force Sequential Write
#define SBC_MP_CACHE_LBCSS (1 << 6) //!< Logical Blk Cache Seg Sz #define SBC_MP_CACHE_LBCSS (1 << 6) //!< Logical Blk Cache Seg Sz
#define SBC_MP_CACHE_DRA (1 << 5) //!< Disable Read-Ahead #define SBC_MP_CACHE_DRA (1 << 5) //!< Disable Read-Ahead
#define SBC_MP_CACHE_NV_DIS (1 << 0) //!< Non-Volatile Cache Disable #define SBC_MP_CACHE_NV_DIS (1 << 0) //!< Non-Volatile Cache Disable
uint8_t nr_cache_segments; uint8_t nr_cache_segments;
be16_t cache_segment_size; be16_t cache_segment_size;
uint8_t reserved[4]; uint8_t reserved[4];
}; };
/** /**
* \brief SBC-2 Read-Write Error Recovery mode page * \brief SBC-2 Read-Write Error Recovery mode page
*/ */
struct sbc_rdwr_error_recovery_mode_page { struct sbc_rdwr_error_recovery_mode_page {
uint8_t page_code; uint8_t page_code;
uint8_t page_length; uint8_t page_length;
#define SPC_MP_RW_ERR_RECOV_PAGE_LENGTH 0x0A #define SPC_MP_RW_ERR_RECOV_PAGE_LENGTH 0x0A
uint8_t flags1; uint8_t flags1;
#define SBC_MP_RW_ERR_RECOV_AWRE (1 << 7) #define SBC_MP_RW_ERR_RECOV_AWRE (1 << 7)
#define SBC_MP_RW_ERR_RECOV_ARRE (1 << 6) #define SBC_MP_RW_ERR_RECOV_ARRE (1 << 6)
#define SBC_MP_RW_ERR_RECOV_TB (1 << 5) #define SBC_MP_RW_ERR_RECOV_TB (1 << 5)
#define SBC_MP_RW_ERR_RECOV_RC (1 << 4) #define SBC_MP_RW_ERR_RECOV_RC (1 << 4)
#define SBC_MP_RW_ERR_RECOV_ERR (1 << 3) #define SBC_MP_RW_ERR_RECOV_ERR (1 << 3)
#define SBC_MP_RW_ERR_RECOV_PER (1 << 2) #define SBC_MP_RW_ERR_RECOV_PER (1 << 2)
#define SBC_MP_RW_ERR_RECOV_DTE (1 << 1) #define SBC_MP_RW_ERR_RECOV_DTE (1 << 1)
#define SBC_MP_RW_ERR_RECOV_DCR (1 << 0) #define SBC_MP_RW_ERR_RECOV_DCR (1 << 0)
uint8_t read_retry_count; uint8_t read_retry_count;
uint8_t correction_span; uint8_t correction_span;
uint8_t head_offset_count; uint8_t head_offset_count;
uint8_t data_strobe_offset_count; uint8_t data_strobe_offset_count;
uint8_t flags2; uint8_t flags2;
uint8_t write_retry_count; uint8_t write_retry_count;
uint8_t flags3; uint8_t flags3;
be16_t recovery_time_limit; be16_t recovery_time_limit;
}; };
//@} //@}
@@ -164,8 +162,8 @@ struct sbc_rdwr_error_recovery_mode_page {
* \brief SBC-2 READ CAPACITY (10) parameter data * \brief SBC-2 READ CAPACITY (10) parameter data
*/ */
struct sbc_read_capacity10_data { struct sbc_read_capacity10_data {
be32_t max_lba; //!< LBA of last logical block be32_t max_lba; //!< LBA of last logical block
be32_t block_len; //!< Number of bytes in the last logical block be32_t block_len; //!< Number of bytes in the last logical block
}; };
//@} //@}

5
Marlin/src/HAL/DUE/usb/sd_mmc_spi_mem.h
View File

@@ -45,7 +45,6 @@
* Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a> * Support and FAQ: visit <a href="https://www.atmel.com/design-support/">Atmel Support</a>
*/ */
#ifndef _SD_MMC_SPI_MEM_H_ #ifndef _SD_MMC_SPI_MEM_H_
#define _SD_MMC_SPI_MEM_H_ #define _SD_MMC_SPI_MEM_H_
@@ -63,17 +62,14 @@
#error sd_mmc_spi_mem.h is #included although SD_MMC_SPI_MEM is disabled #error sd_mmc_spi_mem.h is #included although SD_MMC_SPI_MEM is disabled
#endif #endif
#include "ctrl_access.h" #include "ctrl_access.h"
//_____ D E F I N I T I O N S ______________________________________________ //_____ D E F I N I T I O N S ______________________________________________
#define SD_MMC_REMOVED 0 #define SD_MMC_REMOVED 0
#define SD_MMC_INSERTED 1 #define SD_MMC_INSERTED 1
#define SD_MMC_REMOVING 2 #define SD_MMC_REMOVING 2
//---- CONTROL FUNCTIONS ---- //---- CONTROL FUNCTIONS ----
//! //!
//! @brief This function initializes the hw/sw resources required to drive the SD_MMC_SPI. //! @brief This function initializes the hw/sw resources required to drive the SD_MMC_SPI.
@@ -133,7 +129,6 @@ extern bool sd_mmc_spi_wr_protect(void);
//! //!
extern bool sd_mmc_spi_removal(void); extern bool sd_mmc_spi_removal(void);
//---- ACCESS DATA FUNCTIONS ---- //---- ACCESS DATA FUNCTIONS ----
#if ACCESS_USB == true #if ACCESS_USB == true

339
Marlin/src/HAL/DUE/usb/spc_protocol.h
View File

@@ -59,23 +59,23 @@
//! \name SCSI commands defined by SPC-2 //! \name SCSI commands defined by SPC-2
//@{ //@{
#define SPC_TEST_UNIT_READY 0x00 #define SPC_TEST_UNIT_READY 0x00
#define SPC_REQUEST_SENSE 0x03 #define SPC_REQUEST_SENSE 0x03
#define SPC_INQUIRY 0x12 #define SPC_INQUIRY 0x12
#define SPC_MODE_SELECT6 0x15 #define SPC_MODE_SELECT6 0x15
#define SPC_MODE_SENSE6 0x1A #define SPC_MODE_SENSE6 0x1A
#define SPC_SEND_DIAGNOSTIC 0x1D #define SPC_SEND_DIAGNOSTIC 0x1D
#define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E #define SPC_PREVENT_ALLOW_MEDIUM_REMOVAL 0x1E
#define SPC_MODE_SENSE10 0x5A #define SPC_MODE_SENSE10 0x5A
#define SPC_REPORT_LUNS 0xA0 #define SPC_REPORT_LUNS 0xA0
//@} //@}
//! \brief May be set in byte 0 of the INQUIRY CDB //! \brief May be set in byte 0 of the INQUIRY CDB
//@{ //@{
//! Enable Vital Product Data //! Enable Vital Product Data
#define SCSI_INQ_REQ_EVPD 0x01 #define SCSI_INQ_REQ_EVPD 0x01
//! Command Support Data specified by the PAGE OR OPERATION CODE field //! Command Support Data specified by the PAGE OR OPERATION CODE field
#define SCSI_INQ_REQ_CMDT 0x02 #define SCSI_INQ_REQ_CMDT 0x02
//@} //@}
COMPILER_PACK_SET(1) COMPILER_PACK_SET(1)
@@ -84,110 +84,110 @@ COMPILER_PACK_SET(1)
* \brief SCSI Standard Inquiry data structure * \brief SCSI Standard Inquiry data structure
*/ */
struct scsi_inquiry_data { struct scsi_inquiry_data {
uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type uint8_t pq_pdt; //!< Peripheral Qual / Peripheral Dev Type
#define SCSI_INQ_PQ_CONNECTED 0x00 //!< Peripheral connected #define SCSI_INQ_PQ_CONNECTED 0x00 //!< Peripheral connected
#define SCSI_INQ_PQ_NOT_CONN 0x20 //!< Peripheral not connected #define SCSI_INQ_PQ_NOT_CONN 0x20 //!< Peripheral not connected
#define SCSI_INQ_PQ_NOT_SUPP 0x60 //!< Peripheral not supported #define SCSI_INQ_PQ_NOT_SUPP 0x60 //!< Peripheral not supported
#define SCSI_INQ_DT_DIR_ACCESS 0x00 //!< Direct Access (SBC) #define SCSI_INQ_DT_DIR_ACCESS 0x00 //!< Direct Access (SBC)
#define SCSI_INQ_DT_SEQ_ACCESS 0x01 //!< Sequential Access #define SCSI_INQ_DT_SEQ_ACCESS 0x01 //!< Sequential Access
#define SCSI_INQ_DT_PRINTER 0x02 //!< Printer #define SCSI_INQ_DT_PRINTER 0x02 //!< Printer
#define SCSI_INQ_DT_PROCESSOR 0x03 //!< Processor device #define SCSI_INQ_DT_PROCESSOR 0x03 //!< Processor device
#define SCSI_INQ_DT_WRITE_ONCE 0x04 //!< Write-once device #define SCSI_INQ_DT_WRITE_ONCE 0x04 //!< Write-once device
#define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device #define SCSI_INQ_DT_CD_DVD 0x05 //!< CD/DVD device
#define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory #define SCSI_INQ_DT_OPTICAL 0x07 //!< Optical Memory
#define SCSI_INQ_DT_MC 0x08 //!< Medium Changer #define SCSI_INQ_DT_MC 0x08 //!< Medium Changer
#define SCSI_INQ_DT_ARRAY 0x0C //!< Storage Array Controller #define SCSI_INQ_DT_ARRAY 0x0C //!< Storage Array Controller
#define SCSI_INQ_DT_ENCLOSURE 0x0D //!< Enclosure Services #define SCSI_INQ_DT_ENCLOSURE 0x0D //!< Enclosure Services
#define SCSI_INQ_DT_RBC 0x0E //!< Simplified Direct Access #define SCSI_INQ_DT_RBC 0x0E //!< Simplified Direct Access
#define SCSI_INQ_DT_OCRW 0x0F //!< Optical card reader/writer #define SCSI_INQ_DT_OCRW 0x0F //!< Optical card reader/writer
#define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands #define SCSI_INQ_DT_BCC 0x10 //!< Bridge Controller Commands
#define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage #define SCSI_INQ_DT_OSD 0x11 //!< Object-based Storage
#define SCSI_INQ_DT_NONE 0x1F //!< No Peripheral #define SCSI_INQ_DT_NONE 0x1F //!< No Peripheral
uint8_t flags1; //!< Flags (byte 1) uint8_t flags1; //!< Flags (byte 1)
#define SCSI_INQ_RMB 0x80 //!< Removable Medium #define SCSI_INQ_RMB 0x80 //!< Removable Medium
uint8_t version; //!< Version uint8_t version; //!< Version
#define SCSI_INQ_VER_NONE 0x00 //!< No standards conformance #define SCSI_INQ_VER_NONE 0x00 //!< No standards conformance
#define SCSI_INQ_VER_SPC 0x03 //!< SCSI Primary Commands (link to SBC) #define SCSI_INQ_VER_SPC 0x03 //!< SCSI Primary Commands (link to SBC)
#define SCSI_INQ_VER_SPC2 0x04 //!< SCSI Primary Commands - 2 (link to SBC-2) #define SCSI_INQ_VER_SPC2 0x04 //!< SCSI Primary Commands - 2 (link to SBC-2)
#define SCSI_INQ_VER_SPC3 0x05 //!< SCSI Primary Commands - 3 (link to SBC-2) #define SCSI_INQ_VER_SPC3 0x05 //!< SCSI Primary Commands - 3 (link to SBC-2)
#define SCSI_INQ_VER_SPC4 0x06 //!< SCSI Primary Commands - 4 (link to SBC-3) #define SCSI_INQ_VER_SPC4 0x06 //!< SCSI Primary Commands - 4 (link to SBC-3)
uint8_t flags3; //!< Flags (byte 3) uint8_t flags3; //!< Flags (byte 3)
#define SCSI_INQ_NORMACA 0x20 //!< Normal ACA Supported #define SCSI_INQ_NORMACA 0x20 //!< Normal ACA Supported
#define SCSI_INQ_HISUP 0x10 //!< Hierarchal LUN addressing #define SCSI_INQ_HISUP 0x10 //!< Hierarchal LUN addressing
#define SCSI_INQ_RSP_SPC2 0x02 //!< SPC-2 / SPC-3 response format #define SCSI_INQ_RSP_SPC2 0x02 //!< SPC-2 / SPC-3 response format
uint8_t addl_len; //!< Additional Length (n-4) uint8_t addl_len; //!< Additional Length (n-4)
#define SCSI_INQ_ADDL_LEN(tot) ((tot)-5) //!< Total length is \a tot #define SCSI_INQ_ADDL_LEN(tot) ((tot)-5) //!< Total length is \a tot
uint8_t flags5; //!< Flags (byte 5) uint8_t flags5; //!< Flags (byte 5)
#define SCSI_INQ_SCCS 0x80 #define SCSI_INQ_SCCS 0x80
uint8_t flags6; //!< Flags (byte 6) uint8_t flags6; //!< Flags (byte 6)
#define SCSI_INQ_BQUE 0x80 #define SCSI_INQ_BQUE 0x80
#define SCSI_INQ_ENCSERV 0x40 #define SCSI_INQ_ENCSERV 0x40
#define SCSI_INQ_MULTIP 0x10 #define SCSI_INQ_MULTIP 0x10
#define SCSI_INQ_MCHGR 0x08 #define SCSI_INQ_MCHGR 0x08
#define SCSI_INQ_ADDR16 0x01 #define SCSI_INQ_ADDR16 0x01
uint8_t flags7; //!< Flags (byte 7) uint8_t flags7; //!< Flags (byte 7)
#define SCSI_INQ_WBUS16 0x20 #define SCSI_INQ_WBUS16 0x20
#define SCSI_INQ_SYNC 0x10 #define SCSI_INQ_SYNC 0x10
#define SCSI_INQ_LINKED 0x08 #define SCSI_INQ_LINKED 0x08
#define SCSI_INQ_CMDQUE 0x02 #define SCSI_INQ_CMDQUE 0x02
uint8_t vendor_id[8]; //!< T10 Vendor Identification uint8_t vendor_id[8]; //!< T10 Vendor Identification
uint8_t product_id[16]; //!< Product Identification uint8_t product_id[16]; //!< Product Identification
uint8_t product_rev[4]; //!< Product Revision Level uint8_t product_rev[4]; //!< Product Revision Level
}; };
/** /**
* \brief SCSI Standard Request sense data structure * \brief SCSI Standard Request sense data structure
*/ */
struct scsi_request_sense_data { struct scsi_request_sense_data {
/* 1st byte: REQUEST SENSE response flags*/ /* 1st byte: REQUEST SENSE response flags*/
uint8_t valid_reponse_code; uint8_t valid_reponse_code;
#define SCSI_SENSE_VALID 0x80 //!< Indicates the INFORMATION field contains valid information #define SCSI_SENSE_VALID 0x80 //!< Indicates the INFORMATION field contains valid information
#define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F #define SCSI_SENSE_RESPONSE_CODE_MASK 0x7F
#define SCSI_SENSE_CURRENT 0x70 //!< Response code 70h (current errors) #define SCSI_SENSE_CURRENT 0x70 //!< Response code 70h (current errors)
#define SCSI_SENSE_DEFERRED 0x71 #define SCSI_SENSE_DEFERRED 0x71
/* 2nd byte */ /* 2nd byte */
uint8_t obsolete; uint8_t obsolete;
/* 3rd byte */ /* 3rd byte */
uint8_t sense_flag_key; uint8_t sense_flag_key;
#define SCSI_SENSE_FILEMARK 0x80 //!< Indicates that the current command has read a filemark or setmark. #define SCSI_SENSE_FILEMARK 0x80 //!< Indicates that the current command has read a filemark or setmark.
#define SCSI_SENSE_EOM 0x40 //!< Indicates that an end-of-medium condition exists. #define SCSI_SENSE_EOM 0x40 //!< Indicates that an end-of-medium condition exists.
#define SCSI_SENSE_ILI 0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium. #define SCSI_SENSE_ILI 0x20 //!< Indicates that the requested logical block length did not match the logical block length of the data on the medium.
#define SCSI_SENSE_RESERVED 0x10 //!< Reserved #define SCSI_SENSE_RESERVED 0x10 //!< Reserved
#define SCSI_SENSE_KEY(x) (x&0x0F) //!< Sense Key #define SCSI_SENSE_KEY(x) (x&0x0F) //!< Sense Key
/* 4th to 7th bytes - INFORMATION field */ /* 4th to 7th bytes - INFORMATION field */
uint8_t information[4]; uint8_t information[4];
/* 8th byte - ADDITIONAL SENSE LENGTH field */ /* 8th byte - ADDITIONAL SENSE LENGTH field */
uint8_t AddSenseLen; uint8_t AddSenseLen;
#define SCSI_SENSE_ADDL_LEN(total_len) ((total_len) - 8) #define SCSI_SENSE_ADDL_LEN(total_len) ((total_len) - 8)
/* 9th to 12th byte - COMMAND-SPECIFIC INFORMATION field */ /* 9th to 12th byte - COMMAND-SPECIFIC INFORMATION field */
uint8_t CmdSpecINFO[4]; uint8_t CmdSpecINFO[4];
/* 13th byte - ADDITIONAL SENSE CODE field */ /* 13th byte - ADDITIONAL SENSE CODE field */
uint8_t AddSenseCode; uint8_t AddSenseCode;
/* 14th byte - ADDITIONAL SENSE CODE QUALIFIER field */ /* 14th byte - ADDITIONAL SENSE CODE QUALIFIER field */
uint8_t AddSnsCodeQlfr; uint8_t AddSnsCodeQlfr;
/* 15th byte - FIELD REPLACEABLE UNIT CODE field */ /* 15th byte - FIELD REPLACEABLE UNIT CODE field */
uint8_t FldReplUnitCode; uint8_t FldReplUnitCode;
/* 16th byte */ /* 16th byte */
uint8_t SenseKeySpec[3]; uint8_t SenseKeySpec[3];
#define SCSI_SENSE_SKSV 0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information #define SCSI_SENSE_SKSV 0x80 //!< Indicates the SENSE-KEY SPECIFIC field contains valid information
}; };
COMPILER_PACK_RESET() COMPILER_PACK_RESET()
/* Vital Product Data page codes */ /* Vital Product Data page codes */
enum scsi_vpd_page_code { enum scsi_vpd_page_code {
SCSI_VPD_SUPPORTED_PAGES = 0x00, SCSI_VPD_SUPPORTED_PAGES = 0x00,
SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80, SCSI_VPD_UNIT_SERIAL_NUMBER = 0x80,
SCSI_VPD_DEVICE_IDENTIFICATION = 0x83, SCSI_VPD_DEVICE_IDENTIFICATION = 0x83,
}; };
#define SCSI_VPD_HEADER_SIZE 4 #define SCSI_VPD_HEADER_SIZE 4
@@ -200,37 +200,36 @@ enum scsi_vpd_page_code {
#define SCSI_VPD_ID_TYPE_T10 1 #define SCSI_VPD_ID_TYPE_T10 1
/* Sense keys */ /* Sense keys */
enum scsi_sense_key { enum scsi_sense_key {
SCSI_SK_NO_SENSE = 0x0, SCSI_SK_NO_SENSE = 0x0,
SCSI_SK_RECOVERED_ERROR = 0x1, SCSI_SK_RECOVERED_ERROR = 0x1,
SCSI_SK_NOT_READY = 0x2, SCSI_SK_NOT_READY = 0x2,
SCSI_SK_MEDIUM_ERROR = 0x3, SCSI_SK_MEDIUM_ERROR = 0x3,
SCSI_SK_HARDWARE_ERROR = 0x4, SCSI_SK_HARDWARE_ERROR = 0x4,
SCSI_SK_ILLEGAL_REQUEST = 0x5, SCSI_SK_ILLEGAL_REQUEST = 0x5,
SCSI_SK_UNIT_ATTENTION = 0x6, SCSI_SK_UNIT_ATTENTION = 0x6,
SCSI_SK_DATA_PROTECT = 0x7, SCSI_SK_DATA_PROTECT = 0x7,
SCSI_SK_BLANK_CHECK = 0x8, SCSI_SK_BLANK_CHECK = 0x8,
SCSI_SK_VENDOR_SPECIFIC = 0x9, SCSI_SK_VENDOR_SPECIFIC = 0x9,
SCSI_SK_COPY_ABORTED = 0xA, SCSI_SK_COPY_ABORTED = 0xA,
SCSI_SK_ABORTED_COMMAND = 0xB, SCSI_SK_ABORTED_COMMAND = 0xB,
SCSI_SK_VOLUME_OVERFLOW = 0xD, SCSI_SK_VOLUME_OVERFLOW = 0xD,
SCSI_SK_MISCOMPARE = 0xE, SCSI_SK_MISCOMPARE = 0xE,
}; };
/* Additional Sense Code / Additional Sense Code Qualifier pairs */ /* Additional Sense Code / Additional Sense Code Qualifier pairs */
enum scsi_asc_ascq { enum scsi_asc_ascq {
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000, SCSI_ASC_NO_ADDITIONAL_SENSE_INFO = 0x0000,
SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405, SCSI_ASC_LU_NOT_READY_REBUILD_IN_PROGRESS = 0x0405,
SCSI_ASC_WRITE_ERROR = 0x0C00, SCSI_ASC_WRITE_ERROR = 0x0C00,
SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100, SCSI_ASC_UNRECOVERED_READ_ERROR = 0x1100,
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000, SCSI_ASC_INVALID_COMMAND_OPERATION_CODE = 0x2000,
SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400, SCSI_ASC_INVALID_FIELD_IN_CDB = 0x2400,
SCSI_ASC_WRITE_PROTECTED = 0x2700, SCSI_ASC_WRITE_PROTECTED = 0x2700,
SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800, SCSI_ASC_NOT_READY_TO_READY_CHANGE = 0x2800,
SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00, SCSI_ASC_MEDIUM_NOT_PRESENT = 0x3A00,
SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400, SCSI_ASC_INTERNAL_TARGET_FAILURE = 0x4400,
}; };
/** /**
@@ -240,9 +239,9 @@ enum scsi_asc_ascq {
* that are applicable to all SCSI devices. * that are applicable to all SCSI devices.
*/ */
enum scsi_spc_mode { enum scsi_spc_mode {
SCSI_MS_MODE_VENDOR_SPEC = 0x00, SCSI_MS_MODE_VENDOR_SPEC = 0x00,
SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page SCSI_MS_MODE_INFEXP = 0x1C, // Informational exceptions control page
SCSI_MS_MODE_ALL = 0x3F, SCSI_MS_MODE_ALL = 0x3F,
}; };
/** /**
@@ -250,51 +249,45 @@ enum scsi_spc_mode {
* See chapter 8.3.8 * See chapter 8.3.8
*/ */
struct spc_control_page_info_execpt { struct spc_control_page_info_execpt {
uint8_t page_code; uint8_t page_code;
uint8_t page_length; uint8_t page_length;
#define SPC_MP_INFEXP_PAGE_LENGTH 0x0A #define SPC_MP_INFEXP_PAGE_LENGTH 0x0A
uint8_t flags1; uint8_t flags1;
#define SPC_MP_INFEXP_PERF (1<<7) //!< Initiator Control #define SPC_MP_INFEXP_PERF (1<<7) //!< Initiator Control
#define SPC_MP_INFEXP_EBF (1<<5) //!< Caching Analysis Permitted #define SPC_MP_INFEXP_EBF (1<<5) //!< Caching Analysis Permitted
#define SPC_MP_INFEXP_EWASC (1<<4) //!< Discontinuity #define SPC_MP_INFEXP_EWASC (1<<4) //!< Discontinuity
#define SPC_MP_INFEXP_DEXCPT (1<<3) //!< Size enable #define SPC_MP_INFEXP_DEXCPT (1<<3) //!< Size enable
#define SPC_MP_INFEXP_TEST (1<<2) //!< Writeback Cache Enable #define SPC_MP_INFEXP_TEST (1<<2) //!< Writeback Cache Enable
#define SPC_MP_INFEXP_LOGERR (1<<0) //!< Log errors bit #define SPC_MP_INFEXP_LOGERR (1<<0) //!< Log errors bit
uint8_t mrie; uint8_t mrie;
#define SPC_MP_INFEXP_MRIE_NO_REPORT 0x00 #define SPC_MP_INFEXP_MRIE_NO_REPORT 0x00
#define SPC_MP_INFEXP_MRIE_ASYNC_EVENT 0x01 #define SPC_MP_INFEXP_MRIE_ASYNC_EVENT 0x01
#define SPC_MP_INFEXP_MRIE_GEN_UNIT 0x02 #define SPC_MP_INFEXP_MRIE_GEN_UNIT 0x02
#define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR 0x03 #define SPC_MP_INFEXP_MRIE_COND_RECOV_ERROR 0x03
#define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04 #define SPC_MP_INFEXP_MRIE_UNCOND_RECOV_ERROR 0x04
#define SPC_MP_INFEXP_MRIE_NO_SENSE 0x05 #define SPC_MP_INFEXP_MRIE_NO_SENSE 0x05
#define SPC_MP_INFEXP_MRIE_ONLY_REPORT 0x06 #define SPC_MP_INFEXP_MRIE_ONLY_REPORT 0x06
be32_t interval_timer; be32_t interval_timer;
be32_t report_count; be32_t report_count;
}; };
enum scsi_spc_mode_sense_pc { enum scsi_spc_mode_sense_pc {
SCSI_MS_SENSE_PC_CURRENT = 0, SCSI_MS_SENSE_PC_CURRENT = 0,
SCSI_MS_SENSE_PC_CHANGEABLE = 1, SCSI_MS_SENSE_PC_CHANGEABLE = 1,
SCSI_MS_SENSE_PC_DEFAULT = 2, SCSI_MS_SENSE_PC_DEFAULT = 2,
SCSI_MS_SENSE_PC_SAVED = 3, SCSI_MS_SENSE_PC_SAVED = 3,
}; };
static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb) {
return (cdb[1] >> 3) & 1;
static inline bool scsi_mode_sense_dbd_is_set(const uint8_t * cdb)
{
return (cdb[1] >> 3) & 1;
} }
static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) static inline uint8_t scsi_mode_sense_get_page_code(const uint8_t * cdb) {
{ return cdb[2] & 0x3F;
return cdb[2] & 0x3F;
} }
static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb) {
{ return cdb[2] >> 6;
return cdb[2] >> 6;
} }
/** /**
@@ -302,10 +295,10 @@ static inline uint8_t scsi_mode_sense_get_pc(const uint8_t * cdb)
* SENSE(6) * SENSE(6)
*/ */
struct scsi_mode_param_header6 { struct scsi_mode_param_header6 {
uint8_t mode_data_length; //!< Number of bytes after this uint8_t mode_data_length; //!< Number of bytes after this
uint8_t medium_type; //!< Medium Type uint8_t medium_type; //!< Medium Type
uint8_t device_specific_parameter; //!< Defined by command set uint8_t device_specific_parameter; //!< Defined by command set
uint8_t block_descriptor_length; //!< Length of block descriptors uint8_t block_descriptor_length; //!< Length of block descriptors
}; };
/** /**
@@ -313,23 +306,23 @@ struct scsi_mode_param_header6 {
* SENSE(10) * SENSE(10)
*/ */
struct scsi_mode_param_header10 { struct scsi_mode_param_header10 {
be16_t mode_data_length; //!< Number of bytes after this be16_t mode_data_length; //!< Number of bytes after this
uint8_t medium_type; //!< Medium Type uint8_t medium_type; //!< Medium Type
uint8_t device_specific_parameter; //!< Defined by command set uint8_t device_specific_parameter; //!< Defined by command set
uint8_t flags4; //!< LONGLBA in bit 0 uint8_t flags4; //!< LONGLBA in bit 0
uint8_t reserved; uint8_t reserved;
be16_t block_descriptor_length; //!< Length of block descriptors be16_t block_descriptor_length; //!< Length of block descriptors
}; };
/** /**
* \brief SCSI Page_0 Mode Page header (SPF not set) * \brief SCSI Page_0 Mode Page header (SPF not set)
*/ */
struct scsi_mode_page_0_header { struct scsi_mode_page_0_header {
uint8_t page_code; uint8_t page_code;
#define SCSI_PAGE_CODE_PS (1 << 7) //!< Parameters Saveable #define SCSI_PAGE_CODE_PS (1 << 7) //!< Parameters Saveable
#define SCSI_PAGE_CODE_SPF (1 << 6) //!< SubPage Format #define SCSI_PAGE_CODE_SPF (1 << 6) //!< SubPage Format
uint8_t page_length; //!< Number of bytes after this uint8_t page_length; //!< Number of bytes after this
#define SCSI_MS_PAGE_LEN(total) ((total) - 2) #define SCSI_MS_PAGE_LEN(total) ((total) - 2)
}; };
//@} //@}

31
Marlin/src/HAL/DUE/usb/sysclk.h
View File

@@ -71,7 +71,7 @@
* \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code * \subsection sysclk_quickstart_use_case_1_setup_steps Initialization code
* Add to the application initialization code: * Add to the application initialization code:
* \code * \code
sysclk_init(); sysclk_init();
\endcode \endcode
* *
* \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow * \subsection sysclk_quickstart_use_case_1_setup_steps_workflow Workflow
@@ -82,15 +82,15 @@
* Add or uncomment the following in your conf_clock.h header file, commenting out all other * Add or uncomment the following in your conf_clock.h header file, commenting out all other
* definitions of the same symbol(s): * definitions of the same symbol(s):
* \code * \code
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLLACK
// Fpll0 = (Fclk * PLL_mul) / PLL_div // Fpll0 = (Fclk * PLL_mul) / PLL_div
#define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL
#define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL) #define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
#define CONFIG_PLL0_DIV 1 #define CONFIG_PLL0_DIV 1
// Fbus = Fsys / BUS_div // Fbus = Fsys / BUS_div
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1 #define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
\endcode \endcode
* *
* \subsection sysclk_quickstart_use_case_1_example_workflow Workflow * \subsection sysclk_quickstart_use_case_1_example_workflow Workflow
@@ -100,14 +100,14 @@
* \code #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL \endcode * \code #define CONFIG_PLL0_SOURCE PLL_SRC_MAINCK_XTAL \endcode
* -# Configure the PLL module to multiply the external fast crystal oscillator frequency up to 84MHz: * -# Configure the PLL module to multiply the external fast crystal oscillator frequency up to 84MHz:
* \code * \code
#define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL) #define CONFIG_PLL0_MUL (84000000UL / BOARD_FREQ_MAINCK_XTAL)
#define CONFIG_PLL0_DIV 1 #define CONFIG_PLL0_DIV 1
\endcode \endcode
* \note For user boards, \c BOARD_FREQ_MAINCK_XTAL should be defined in the board \c conf_board.h configuration * \note For user boards, \c BOARD_FREQ_MAINCK_XTAL should be defined in the board \c conf_board.h configuration
* file as the frequency of the fast crystal attached to the microcontroller. * file as the frequency of the fast crystal attached to the microcontroller.
* -# Configure the main clock to run at the full 84MHz, disable scaling of the main system clock speed: * -# Configure the main clock to run at the full 84MHz, disable scaling of the main system clock speed:
* \code * \code
#define CONFIG_SYSCLK_PRES SYSCLK_PRES_1 #define CONFIG_SYSCLK_PRES SYSCLK_PRES_1
\endcode \endcode
* \note Some dividers are powers of two, while others are integer division factors. Refer to the * \note Some dividers are powers of two, while others are integer division factors. Refer to the
* formulas in the conf_clock.h template commented above each division define. * formulas in the conf_clock.h template commented above each division define.
@@ -136,7 +136,7 @@ extern "C" {
* initialization. * initialization.
*/ */
#ifndef CONFIG_SYSCLK_SOURCE #ifndef CONFIG_SYSCLK_SOURCE
# define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_4M_RC #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_MAINCK_4M_RC
#endif #endif
/** /**
* \def CONFIG_SYSCLK_PRES * \def CONFIG_SYSCLK_PRES
@@ -149,7 +149,7 @@ extern "C" {
* after initialization. * after initialization.
*/ */
#ifndef CONFIG_SYSCLK_PRES #ifndef CONFIG_SYSCLK_PRES
# define CONFIG_SYSCLK_PRES 0 #define CONFIG_SYSCLK_PRES 0
#endif #endif
//@} //@}
@@ -197,7 +197,7 @@ extern "C" {
* USB is not required. * USB is not required.
*/ */
#ifdef __DOXYGEN__ #ifdef __DOXYGEN__
# define CONFIG_USBCLK_SOURCE #define CONFIG_USBCLK_SOURCE
#endif #endif
/** /**
@@ -209,10 +209,9 @@ extern "C" {
* defined. * defined.
*/ */
#ifdef __DOXYGEN__ #ifdef __DOXYGEN__
# define CONFIG_USBCLK_DIV #define CONFIG_USBCLK_DIV
#endif #endif
extern void sysclk_enable_usb(void); extern void sysclk_enable_usb(void);
extern void sysclk_disable_usb(void); extern void sysclk_disable_usb(void);

1
Marlin/src/HAL/DUE/usb/udc.c
View File

@@ -83,7 +83,6 @@ static usb_iface_desc_t UDC_DESC_STORAGE *udc_ptr_iface;
//! @} //! @}
//! \name Internal structure to store the USB device main strings //! \name Internal structure to store the USB device main strings
//! @{ //! @{

403
Marlin/src/HAL/DUE/usb/udc.h
View File

@@ -144,15 +144,15 @@ extern "C" {
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode * \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
* User C file contains: * User C file contains:
* \code * \code
// Authorize VBUS monitoring // Authorize VBUS monitoring
if (!udc_include_vbus_monitoring()) { if (!udc_include_vbus_monitoring()) {
// Implement custom VBUS monitoring via GPIO or other // Implement custom VBUS monitoring via GPIO or other
} }
Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other Event_VBUS_present() // VBUS interrupt or GPIO interrupt or other
{ {
// Attach USB Device // Attach USB Device
udc_attach(); udc_attach();
} }
\endcode \endcode
* *
* - Case of battery charging. conf_usb.h file contains define * - Case of battery charging. conf_usb.h file contains define
@@ -160,21 +160,20 @@ extern "C" {
* \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode * \code #define USB_DEVICE_ATTACH_AUTO_DISABLE \endcode
* User C file contains: * User C file contains:
* \code * \code
Event VBUS present() // VBUS interrupt or GPIO interrupt or .. Event VBUS present() // VBUS interrupt or GPIO interrupt or ..
{ {
// Authorize battery charging, but wait key press to start USB. // Authorize battery charging, but wait key press to start USB.
} }
Event Key press() Event Key press()
{ {
// Stop batteries charging // Stop batteries charging
// Start USB // Start USB
udc_attach(); udc_attach();
} }
\endcode \endcode
*/ */
static inline bool udc_include_vbus_monitoring(void) static inline bool udc_include_vbus_monitoring(void) {
{ return udd_include_vbus_monitoring();
return udd_include_vbus_monitoring();
} }
/*! \brief Start the USB Device stack /*! \brief Start the USB Device stack
@@ -192,32 +191,26 @@ void udc_stop(void);
* then it will attach device when an acceptable Vbus * then it will attach device when an acceptable Vbus
* level from the host is detected. * level from the host is detected.
*/ */
static inline void udc_attach(void) static inline void udc_attach(void) {
{ udd_attach();
udd_attach();
} }
/** /**
* \brief Detaches the device from the bus * \brief Detaches the device from the bus
* *
* The driver must remove pull-up on USB line D- or D+. * The driver must remove pull-up on USB line D- or D+.
*/ */
static inline void udc_detach(void) static inline void udc_detach(void) {
{ udd_detach();
udd_detach();
} }
/*! \brief The USB driver sends a resume signal called \e "Upstream Resume" /*! \brief The USB driver sends a resume signal called \e "Upstream Resume"
* This is authorized only when the remote wakeup feature is enabled by host. * This is authorized only when the remote wakeup feature is enabled by host.
*/ */
static inline void udc_remotewakeup(void) static inline void udc_remotewakeup(void) {
{ udd_send_remotewakeup();
udd_send_remotewakeup();
} }
/** /**
* \brief Returns a pointer on the current interface descriptor * \brief Returns a pointer on the current interface descriptor
* *
@@ -296,23 +289,23 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* *
* for AVR and SAM3/4 devices, add to the initialization code: * for AVR and SAM3/4 devices, add to the initialization code:
* \code * \code
sysclk_init(); sysclk_init();
irq_initialize_vectors(); irq_initialize_vectors();
cpu_irq_enable(); cpu_irq_enable();
board_init(); board_init();
sleepmgr_init(); // Optional sleepmgr_init(); // Optional
\endcode \endcode
* *
* For SAMD devices, add to the initialization code: * For SAMD devices, add to the initialization code:
* \code * \code
system_init(); system_init();
irq_initialize_vectors(); irq_initialize_vectors();
cpu_irq_enable(); cpu_irq_enable();
sleepmgr_init(); // Optional sleepmgr_init(); // Optional
\endcode \endcode
* Add to the main IDLE loop: * Add to the main IDLE loop:
* \code * \code
sleepmgr_enter_sleep(); // Optional sleepmgr_enter_sleep(); // Optional
\endcode \endcode
* *
*/ */
@@ -324,20 +317,20 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* *
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_VENDOR_ID 0x03EB #define USB_DEVICE_VENDOR_ID 0x03EB
#define USB_DEVICE_PRODUCT_ID 0xXXXX #define USB_DEVICE_PRODUCT_ID 0xXXXX
#define USB_DEVICE_MAJOR_VERSION 1 #define USB_DEVICE_MAJOR_VERSION 1
#define USB_DEVICE_MINOR_VERSION 0 #define USB_DEVICE_MINOR_VERSION 0
#define USB_DEVICE_POWER 100 #define USB_DEVICE_POWER 100
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED #define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED
\endcode \endcode
* *
* Add to application C-file: * Add to application C-file:
* \code * \code
void usb_init(void) void usb_init(void)
{ {
udc_start(); udc_start();
} }
\endcode \endcode
*/ */
@@ -349,17 +342,17 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* -# Ensure that conf_usb.h is available and contains the following configuration * -# Ensure that conf_usb.h is available and contains the following configuration
* which is the main USB device configuration: * which is the main USB device configuration:
* - \code // Vendor ID provided by USB org (ATMEL 0x03EB) * - \code // Vendor ID provided by USB org (ATMEL 0x03EB)
#define USB_DEVICE_VENDOR_ID 0x03EB // Type Word #define USB_DEVICE_VENDOR_ID 0x03EB // Type Word
// Product ID (Atmel PID referenced in usb_atmel.h) // Product ID (Atmel PID referenced in usb_atmel.h)
#define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word #define USB_DEVICE_PRODUCT_ID 0xXXXX // Type Word
// Major version of the device // Major version of the device
#define USB_DEVICE_MAJOR_VERSION 1 // Type Byte #define USB_DEVICE_MAJOR_VERSION 1 // Type Byte
// Minor version of the device // Minor version of the device
#define USB_DEVICE_MINOR_VERSION 0 // Type Byte #define USB_DEVICE_MINOR_VERSION 0 // Type Byte
// Maximum device power (mA) // Maximum device power (mA)
#define USB_DEVICE_POWER 100 // Type 9-bits #define USB_DEVICE_POWER 100 // Type 9-bits
// USB attributes to enable features // USB attributes to enable features
#define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode #define USB_DEVICE_ATTR USB_CONFIG_ATTR_BUS_POWERED // Flags \endcode
* -# Call the USB device stack start function to enable stack and start USB: * -# Call the USB device stack start function to enable stack and start USB:
* - \code udc_start(); \endcode * - \code udc_start(); \endcode
* \note In case of USB dual roles (Device and Host) managed through USB OTG connector * \note In case of USB dual roles (Device and Host) managed through USB OTG connector
@@ -372,90 +365,90 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* *
* Content of XMEGA conf_clock.h: * Content of XMEGA conf_clock.h:
* \code * \code
// Configuration based on internal RC: // Configuration based on internal RC:
// USB clock need of 48Mhz // USB clock need of 48Mhz
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC #define CONFIG_USBCLK_SOURCE USBCLK_SRC_RCOSC
#define CONFIG_OSC_RC32_CAL 48000000UL #define CONFIG_OSC_RC32_CAL 48000000UL
#define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF #define CONFIG_OSC_AUTOCAL_RC32MHZ_REF_OSC OSC_ID_USBSOF
// CPU clock need of clock > 12MHz to run with USB (Here 24MHz) // CPU clock need of clock > 12MHz to run with USB (Here 24MHz)
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_RC32MHZ
#define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_2 #define CONFIG_SYSCLK_PSADIV SYSCLK_PSADIV_2
#define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1 #define CONFIG_SYSCLK_PSBCDIV SYSCLK_PSBCDIV_1_1
\endcode \endcode
* *
* Content of conf_clock.h for AT32UC3A0, AT32UC3A1, AT32UC3B devices (USBB): * Content of conf_clock.h for AT32UC3A0, AT32UC3A1, AT32UC3B devices (USBB):
* \code * \code
// Configuration based on 12MHz external OSC: // Configuration based on 12MHz external OSC:
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0 #define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
#define CONFIG_PLL1_MUL 8 #define CONFIG_PLL1_MUL 8
#define CONFIG_PLL1_DIV 2 #define CONFIG_PLL1_DIV 2
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1 #define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div) #define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
\endcode \endcode
* *
* Content of conf_clock.h for AT32UC3A3, AT32UC3A4 devices (USBB with high speed support): * Content of conf_clock.h for AT32UC3A3, AT32UC3A4 devices (USBB with high speed support):
* \code * \code
// Configuration based on 12MHz external OSC: // Configuration based on 12MHz external OSC:
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0 #define CONFIG_USBCLK_SOURCE USBCLK_SRC_OSC0
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div) #define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
\endcode \endcode
* *
* Content of conf_clock.h for AT32UC3C, ATUCXXD, ATUCXXL3U, ATUCXXL4U devices (USBC): * Content of conf_clock.h for AT32UC3C, ATUCXXD, ATUCXXL3U, ATUCXXL4U devices (USBC):
* \code * \code
// Configuration based on 12MHz external OSC: // Configuration based on 12MHz external OSC:
#define CONFIG_PLL1_SOURCE PLL_SRC_OSC0 #define CONFIG_PLL1_SOURCE PLL_SRC_OSC0
#define CONFIG_PLL1_MUL 8 #define CONFIG_PLL1_MUL 8
#define CONFIG_PLL1_DIV 2 #define CONFIG_PLL1_DIV 2
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1 #define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div) #define CONFIG_USBCLK_DIV 1 // Fusb = Fsys/(2 ^ USB_div)
// CPU clock need of clock > 25MHz to run with USBC // CPU clock need of clock > 25MHz to run with USBC
#define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1 #define CONFIG_SYSCLK_SOURCE SYSCLK_SRC_PLL1
\endcode \endcode
* *
* Content of conf_clock.h for SAM3S, SAM3SD, SAM4S devices (UPD: USB Peripheral Device): * Content of conf_clock.h for SAM3S, SAM3SD, SAM4S devices (UPD: USB Peripheral Device):
* \code * \code
// PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div) // PLL1 (B) Options (Fpll = (Fclk * PLL_mul) / PLL_div)
#define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL #define CONFIG_PLL1_SOURCE PLL_SRC_MAINCK_XTAL
#define CONFIG_PLL1_MUL 16 #define CONFIG_PLL1_MUL 16
#define CONFIG_PLL1_DIV 2 #define CONFIG_PLL1_DIV 2
// USB Clock Source Options (Fusb = FpllX / USB_div) // USB Clock Source Options (Fusb = FpllX / USB_div)
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1 #define CONFIG_USBCLK_SOURCE USBCLK_SRC_PLL1
#define CONFIG_USBCLK_DIV 2 #define CONFIG_USBCLK_DIV 2
\endcode \endcode
* *
* Content of conf_clock.h for SAM3U device (UPDHS: USB Peripheral Device High Speed): * Content of conf_clock.h for SAM3U device (UPDHS: USB Peripheral Device High Speed):
* \code * \code
// USB Clock Source fixed at UPLL. // USB Clock Source fixed at UPLL.
\endcode \endcode
* *
* Content of conf_clock.h for SAM3X, SAM3A devices (UOTGHS: USB OTG High Speed): * Content of conf_clock.h for SAM3X, SAM3A devices (UOTGHS: USB OTG High Speed):
* \code * \code
// USB Clock Source fixed at UPLL. // USB Clock Source fixed at UPLL.
#define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL #define CONFIG_USBCLK_SOURCE USBCLK_SRC_UPLL
#define CONFIG_USBCLK_DIV 1 #define CONFIG_USBCLK_DIV 1
\endcode \endcode
* *
* Content of conf_clocks.h for SAMD devices (USB): * Content of conf_clocks.h for SAMD devices (USB):
* \code * \code
// System clock bus configuration // System clock bus configuration
# define CONF_CLOCK_FLASH_WAIT_STATES 2 # define CONF_CLOCK_FLASH_WAIT_STATES 2
// USB Clock Source fixed at DFLL. // USB Clock Source fixed at DFLL.
// SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop // SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop
# define CONF_CLOCK_DFLL_ENABLE true # define CONF_CLOCK_DFLL_ENABLE true
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY # define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_USB_RECOVERY
# define CONF_CLOCK_DFLL_ON_DEMAND true # define CONF_CLOCK_DFLL_ON_DEMAND true
// Set this to true to configure the GCLK when running clocks_init. // Set this to true to configure the GCLK when running clocks_init.
// If set to false, none of the GCLK generators will be configured in clocks_init(). // If set to false, none of the GCLK generators will be configured in clocks_init().
# define CONF_CLOCK_CONFIGURE_GCLK true # define CONF_CLOCK_CONFIGURE_GCLK true
// Configure GCLK generator 0 (Main Clock) // Configure GCLK generator 0 (Main Clock)
# define CONF_CLOCK_GCLK_0_ENABLE true # define CONF_CLOCK_GCLK_0_ENABLE true
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true # define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL # define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
# define CONF_CLOCK_GCLK_0_PRESCALER 1 # define CONF_CLOCK_GCLK_0_PRESCALER 1
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false # define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
\endcode \endcode
*/ */
@@ -474,34 +467,34 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* \subsection udc_use_case_1_usage_code Example code * \subsection udc_use_case_1_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#if // Low speed #if // Low speed
#define USB_DEVICE_LOW_SPEED #define USB_DEVICE_LOW_SPEED
// #define USB_DEVICE_HS_SUPPORT // #define USB_DEVICE_HS_SUPPORT
#elif // Full speed #elif // Full speed
// #define USB_DEVICE_LOW_SPEED // #define USB_DEVICE_LOW_SPEED
// #define USB_DEVICE_HS_SUPPORT // #define USB_DEVICE_HS_SUPPORT
#elif // High speed #elif // High speed
// #define USB_DEVICE_LOW_SPEED // #define USB_DEVICE_LOW_SPEED
#define USB_DEVICE_HS_SUPPORT #define USB_DEVICE_HS_SUPPORT
#endif #endif
\endcode \endcode
* *
* \subsection udc_use_case_1_usage_flow Workflow * \subsection udc_use_case_1_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters * -# Ensure that conf_usb.h is available and contains the following parameters
* required for a USB device low speed (1.5Mbit/s): * required for a USB device low speed (1.5Mbit/s):
* - \code #define USB_DEVICE_LOW_SPEED * - \code #define USB_DEVICE_LOW_SPEED
//#define USB_DEVICE_HS_SUPPORT \endcode //#define USB_DEVICE_HS_SUPPORT \endcode
* -# Ensure that conf_usb.h contains the following parameters * -# Ensure that conf_usb.h contains the following parameters
* required for a USB device full speed (12Mbit/s): * required for a USB device full speed (12Mbit/s):
* - \code //#define USB_DEVICE_LOW_SPEED * - \code //#define USB_DEVICE_LOW_SPEED
//#define USB_DEVICE_HS_SUPPORT \endcode //#define USB_DEVICE_HS_SUPPORT \endcode
* -# Ensure that conf_usb.h contains the following parameters * -# Ensure that conf_usb.h contains the following parameters
* required for a USB device high speed (480Mbit/s): * required for a USB device high speed (480Mbit/s):
* - \code //#define USB_DEVICE_LOW_SPEED * - \code //#define USB_DEVICE_LOW_SPEED
#define USB_DEVICE_HS_SUPPORT \endcode #define USB_DEVICE_HS_SUPPORT \endcode
*/ */
/** /**
@@ -518,20 +511,20 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* \subsection udc_use_case_2_usage_code Example code * \subsection udc_use_case_2_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name" #define USB_DEVICE_MANUFACTURE_NAME "Manufacture name"
#define USB_DEVICE_PRODUCT_NAME "Product name" #define USB_DEVICE_PRODUCT_NAME "Product name"
#define USB_DEVICE_SERIAL_NAME "12...EF" #define USB_DEVICE_SERIAL_NAME "12...EF"
\endcode \endcode
* *
* \subsection udc_use_case_2_usage_flow Workflow * \subsection udc_use_case_2_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters * -# Ensure that conf_usb.h is available and contains the following parameters
* required to enable different USB strings: * required to enable different USB strings:
* - \code // Static ASCII name for the manufacture * - \code // Static ASCII name for the manufacture
#define USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode #define USB_DEVICE_MANUFACTURE_NAME "Manufacture name" \endcode
* - \code // Static ASCII name for the product * - \code // Static ASCII name for the product
#define USB_DEVICE_PRODUCT_NAME "Product name" \endcode #define USB_DEVICE_PRODUCT_NAME "Product name" \endcode
* - \code // Static ASCII name to enable and set a serial number * - \code // Static ASCII name to enable and set a serial number
#define USB_DEVICE_SERIAL_NAME "12...EF" \endcode #define USB_DEVICE_SERIAL_NAME "12...EF" \endcode
*/ */
/** /**
@@ -548,42 +541,42 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* \subsection udc_use_case_3_usage_code Example code * \subsection udc_use_case_3_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_ATTR \ #define USB_DEVICE_ATTR \
(USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED)
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable() #define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
extern void my_callback_remotewakeup_enable(void); extern void my_callback_remotewakeup_enable(void);
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable() #define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
extern void my_callback_remotewakeup_disable(void); extern void my_callback_remotewakeup_disable(void);
\endcode \endcode
* *
* Add to application C-file: * Add to application C-file:
* \code * \code
void my_callback_remotewakeup_enable(void) void my_callback_remotewakeup_enable(void)
{ {
// Enable application wakeup events (e.g. enable GPIO interrupt) // Enable application wakeup events (e.g. enable GPIO interrupt)
} }
void my_callback_remotewakeup_disable(void) void my_callback_remotewakeup_disable(void)
{ {
// Disable application wakeup events (e.g. disable GPIO interrupt) // Disable application wakeup events (e.g. disable GPIO interrupt)
} }
void my_interrupt_event(void) void my_interrupt_event(void)
{ {
udc_remotewakeup(); udc_remotewakeup();
} }
\endcode \endcode
* *
* \subsection udc_use_case_3_usage_flow Workflow * \subsection udc_use_case_3_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters * -# Ensure that conf_usb.h is available and contains the following parameters
* required to enable remote wakeup feature: * required to enable remote wakeup feature:
* - \code // Authorizes the remote wakeup feature * - \code // Authorizes the remote wakeup feature
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode #define USB_DEVICE_ATTR (USB_CONFIG_ATTR_REMOTE_WAKEUP | USB_CONFIG_ATTR_..._POWERED) \endcode
* - \code // Define callback called when the host enables the remotewakeup feature * - \code // Define callback called when the host enables the remotewakeup feature
#define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable() #define UDC_REMOTEWAKEUP_ENABLE() my_callback_remotewakeup_enable()
extern void my_callback_remotewakeup_enable(void); \endcode extern void my_callback_remotewakeup_enable(void); \endcode
* - \code // Define callback called when the host disables the remotewakeup feature * - \code // Define callback called when the host disables the remotewakeup feature
#define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable() #define UDC_REMOTEWAKEUP_DISABLE() my_callback_remotewakeup_disable()
extern void my_callback_remotewakeup_disable(void); \endcode extern void my_callback_remotewakeup_disable(void); \endcode
* -# Send a remote wakeup (USB upstream): * -# Send a remote wakeup (USB upstream):
* - \code udc_remotewakeup(); \endcode * - \code udc_remotewakeup(); \endcode
*/ */
@@ -603,40 +596,40 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* \subsection udc_use_case_5_usage_code Example code * \subsection udc_use_case_5_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) #define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED)
#define UDC_SUSPEND_EVENT() user_callback_suspend_action() #define UDC_SUSPEND_EVENT() user_callback_suspend_action()
extern void user_callback_suspend_action(void) extern void user_callback_suspend_action(void)
#define UDC_RESUME_EVENT() user_callback_resume_action() #define UDC_RESUME_EVENT() user_callback_resume_action()
extern void user_callback_resume_action(void) extern void user_callback_resume_action(void)
\endcode \endcode
* *
* Add to application C-file: * Add to application C-file:
* \code * \code
void user_callback_suspend_action(void) void user_callback_suspend_action(void)
{ {
// Disable hardware component to reduce power consumption // Disable hardware component to reduce power consumption
} }
void user_callback_resume_action(void) void user_callback_resume_action(void)
{ {
// Re-enable hardware component // Re-enable hardware component
} }
\endcode \endcode
* *
* \subsection udc_use_case_5_usage_flow Workflow * \subsection udc_use_case_5_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters: * -# Ensure that conf_usb.h is available and contains the following parameters:
* - \code // Authorizes the BUS power feature * - \code // Authorizes the BUS power feature
#define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode #define USB_DEVICE_ATTR (USB_CONFIG_ATTR_BUS_POWERED) \endcode
* - \code // Define callback called when the host suspend the USB line * - \code // Define callback called when the host suspend the USB line
#define UDC_SUSPEND_EVENT() user_callback_suspend_action() #define UDC_SUSPEND_EVENT() user_callback_suspend_action()
extern void user_callback_suspend_action(void); \endcode extern void user_callback_suspend_action(void); \endcode
* - \code // Define callback called when the host or device resume the USB line * - \code // Define callback called when the host or device resume the USB line
#define UDC_RESUME_EVENT() user_callback_resume_action() #define UDC_RESUME_EVENT() user_callback_resume_action()
extern void user_callback_resume_action(void); \endcode extern void user_callback_resume_action(void); \endcode
* -# Reduce power consumption in suspend mode (max. 2.5mA on Vbus): * -# Reduce power consumption in suspend mode (max. 2.5mA on Vbus):
* - \code void user_callback_suspend_action(void) * - \code void user_callback_suspend_action(void)
{ {
turn_off_components(); turn_off_components();
} \endcode } \endcode
*/ */
/** /**
@@ -654,44 +647,42 @@ usb_iface_desc_t UDC_DESC_STORAGE *udc_get_interface_desc(void);
* \subsection udc_use_case_6_usage_code Example code * \subsection udc_use_case_6_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_SERIAL_NAME #define USB_DEVICE_SERIAL_NAME
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number #define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 #define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12
extern uint8_t serial_number[]; extern uint8_t serial_number[];
\endcode \endcode
* *
* Add to application C-file: * Add to application C-file:
* \code * \code
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH]; uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
void init_build_usb_serial_number(void) void init_build_usb_serial_number(void)
{ {
serial_number[0] = 'A'; serial_number[0] = 'A';
serial_number[1] = 'B'; serial_number[1] = 'B';
... ...
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C'; serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
} \endcode } \endcode
* *
* \subsection udc_use_case_6_usage_flow Workflow * \subsection udc_use_case_6_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters * -# Ensure that conf_usb.h is available and contains the following parameters
* required to enable a USB serial number strings dynamically: * required to enable a USB serial number strings dynamically:
* - \code #define USB_DEVICE_SERIAL_NAME // Define this empty * - \code #define USB_DEVICE_SERIAL_NAME // Define this empty
#define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer #define USB_DEVICE_GET_SERIAL_NAME_POINTER serial_number // Give serial array pointer
#define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 // Give size of serial array #define USB_DEVICE_GET_SERIAL_NAME_LENGTH 12 // Give size of serial array
extern uint8_t serial_number[]; // Declare external serial array \endcode extern uint8_t serial_number[]; // Declare external serial array \endcode
* -# Before start USB stack, initialize the serial array * -# Before start USB stack, initialize the serial array
* - \code * - \code
uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH]; uint8_t serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH];
void init_build_usb_serial_number(void) void init_build_usb_serial_number(void)
{ {
serial_number[0] = 'A'; serial_number[0] = 'A';
serial_number[1] = 'B'; serial_number[1] = 'B';
... ...
serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C'; serial_number[USB_DEVICE_GET_SERIAL_NAME_LENGTH-1] = 'C';
} \endcode } \endcode
*/ */
#endif // _UDC_H_ #endif // _UDC_H_

59
Marlin/src/HAL/DUE/usb/udc_desc.h
View File

@@ -78,50 +78,47 @@ extern "C" {
* For Mega application used "code". * For Mega application used "code".
*/ */
#define UDC_DESC_STORAGE #define UDC_DESC_STORAGE
// Descriptor storage in internal RAM // Descriptor storage in internal RAM
#if (defined UDC_DATA_USE_HRAM_SUPPORT) #if (defined UDC_DATA_USE_HRAM_SUPPORT)
# if defined(__GNUC__) #if defined(__GNUC__)
# define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0"))) #define UDC_DATA(x) COMPILER_WORD_ALIGNED __attribute__((__section__(".data_hram0")))
# define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0"))) #define UDC_BSS(x) COMPILER_ALIGNED(x) __attribute__((__section__(".bss_hram0")))
# elif defined(__ICCAVR32__) #elif defined(__ICCAVR32__)
# define UDC_DATA(x) COMPILER_ALIGNED(x) __data32 #define UDC_DATA(x) COMPILER_ALIGNED(x) __data32
# define UDC_BSS(x) COMPILER_ALIGNED(x) __data32 #define UDC_BSS(x) COMPILER_ALIGNED(x) __data32
# endif #endif
#else #else
# define UDC_DATA(x) COMPILER_ALIGNED(x) #define UDC_DATA(x) COMPILER_ALIGNED(x)
# define UDC_BSS(x) COMPILER_ALIGNED(x) #define UDC_BSS(x) COMPILER_ALIGNED(x)
#endif #endif
/** /**
* \brief Configuration descriptor and UDI link for one USB speed * \brief Configuration descriptor and UDI link for one USB speed
*/ */
typedef struct { typedef struct {
//! USB configuration descriptor //! USB configuration descriptor
usb_conf_desc_t UDC_DESC_STORAGE *desc; usb_conf_desc_t UDC_DESC_STORAGE *desc;
//! Array of UDI API pointer //! Array of UDI API pointer
udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis; udi_api_t UDC_DESC_STORAGE *UDC_DESC_STORAGE * udi_apis;
} udc_config_speed_t; } udc_config_speed_t;
/** /**
* \brief All information about the USB Device * \brief All information about the USB Device
*/ */
typedef struct { typedef struct {
//! USB device descriptor for low or full speed //! USB device descriptor for low or full speed
usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs; usb_dev_desc_t UDC_DESC_STORAGE *confdev_lsfs;
//! USB configuration descriptor and UDI API pointers for low or full speed //! USB configuration descriptor and UDI API pointers for low or full speed
udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs; udc_config_speed_t UDC_DESC_STORAGE *conf_lsfs;
#ifdef USB_DEVICE_HS_SUPPORT #ifdef USB_DEVICE_HS_SUPPORT
//! USB device descriptor for high speed //! USB device descriptor for high speed
usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs; usb_dev_desc_t UDC_DESC_STORAGE *confdev_hs;
//! USB device qualifier, only use in high speed mode //! USB device qualifier, only use in high speed mode
usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier; usb_dev_qual_desc_t UDC_DESC_STORAGE *qualifier;
//! USB configuration descriptor and UDI API pointers for high speed //! USB configuration descriptor and UDI API pointers for high speed
udc_config_speed_t UDC_DESC_STORAGE *conf_hs; udc_config_speed_t UDC_DESC_STORAGE *conf_hs;
#endif #endif
usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos; usb_dev_bos_desc_t UDC_DESC_STORAGE *conf_bos;
} udc_config_t; } udc_config_t;
//! Global variables of USB Device Descriptor and UDI links //! Global variables of USB Device Descriptor and UDI links

59
Marlin/src/HAL/DUE/usb/udd.h
View File

@@ -71,8 +71,8 @@ typedef uint8_t udd_ep_id_t;
//! \brief Endpoint transfer status //! \brief Endpoint transfer status
//! Returned in parameters of callback register via udd_ep_run routine. //! Returned in parameters of callback register via udd_ep_run routine.
typedef enum { typedef enum {
UDD_EP_TRANSFER_OK = 0, UDD_EP_TRANSFER_OK = 0,
UDD_EP_TRANSFER_ABORT = 1, UDD_EP_TRANSFER_ABORT = 1,
} udd_ep_status_t; } udd_ep_status_t;
/** /**
@@ -82,41 +82,37 @@ typedef enum {
* It can be updated by udc_process_setup() from UDC or *setup() from UDIs. * It can be updated by udc_process_setup() from UDC or *setup() from UDIs.
*/ */
typedef struct { typedef struct {
//! Data received in USB SETUP packet //! Data received in USB SETUP packet
//! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD. //! Note: The swap of "req.wValues" from uin16_t to le16_t is done by UDD.
usb_setup_req_t req; usb_setup_req_t req;
//! Point to buffer to send or fill with data following SETUP packet //! Point to buffer to send or fill with data following SETUP packet
//! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer) //! This buffer must be word align for DATA IN phase (use prefix COMPILER_WORD_ALIGNED for buffer)
uint8_t *payload; uint8_t *payload;
//! Size of buffer to send or fill, and content the number of byte transferred //! Size of buffer to send or fill, and content the number of byte transferred
uint16_t payload_size; uint16_t payload_size;
//! Callback called after reception of ZLP from setup request //! Callback called after reception of ZLP from setup request
void (*callback)(void); void (*callback)(void);
//! Callback called when the buffer given (.payload) is full or empty. //! Callback called when the buffer given (.payload) is full or empty.
//! This one return false to abort data transfer, or true with a new buffer in .payload. //! This one return false to abort data transfer, or true with a new buffer in .payload.
bool (*over_under_run)(void); bool (*over_under_run)(void);
} udd_ctrl_request_t; } udd_ctrl_request_t;
extern udd_ctrl_request_t udd_g_ctrlreq; extern udd_ctrl_request_t udd_g_ctrlreq;
//! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer //! Return true if the setup request \a udd_g_ctrlreq indicates IN data transfer
#define Udd_setup_is_in() \ #define Udd_setup_is_in() (USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
(USB_REQ_DIR_IN == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
//! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer //! Return true if the setup request \a udd_g_ctrlreq indicates OUT data transfer
#define Udd_setup_is_out() \ #define Udd_setup_is_out() (USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
(USB_REQ_DIR_OUT == (udd_g_ctrlreq.req.bmRequestType & USB_REQ_DIR_MASK))
//! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype. //! Return the type of the SETUP request \a udd_g_ctrlreq. \see usb_reqtype.
#define Udd_setup_type() \ #define Udd_setup_type() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_TYPE_MASK)
//! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient //! Return the recipient of the SETUP request \a udd_g_ctrlreq. \see usb_recipient
#define Udd_setup_recipient() \ #define Udd_setup_recipient() (udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
(udd_g_ctrlreq.req.bmRequestType & USB_REQ_RECIP_MASK)
/** /**
* \brief End of halt callback function type. * \brief End of halt callback function type.
@@ -134,8 +130,7 @@ typedef void (*udd_callback_halt_cleared_t)(void);
* \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted * \param status UDD_EP_TRANSFER_ABORT, if transfer is aborted
* \param n number of data transferred * \param n number of data transferred
*/ */
typedef void (*udd_callback_trans_t) (udd_ep_status_t status, typedef void (*udd_callback_trans_t) (udd_ep_status_t status, iram_size_t nb_transferred, udd_ep_id_t ep);
iram_size_t nb_transferred, udd_ep_id_t ep);
/** /**
* \brief Authorizes the VBUS event * \brief Authorizes the VBUS event
@@ -218,7 +213,6 @@ void udd_send_remotewakeup(void);
*/ */
void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size ); void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
/** /**
* \name Endpoint Management * \name Endpoint Management
* *
@@ -239,8 +233,7 @@ void udd_set_setup_payload( uint8_t *payload, uint16_t payload_size );
* *
* \return \c 1 if the endpoint is enabled, otherwise \c 0. * \return \c 1 if the endpoint is enabled, otherwise \c 0.
*/ */
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, uint16_t MaxEndpointSize);
uint16_t MaxEndpointSize);
/** /**
* \brief Disables an endpoint * \brief Disables an endpoint
@@ -294,8 +287,7 @@ bool udd_ep_clear_halt(udd_ep_id_t ep);
* *
* \return \c 1 if the register is accepted, otherwise \c 0. * \return \c 1 if the register is accepted, otherwise \c 0.
*/ */
bool udd_ep_wait_stall_clear(udd_ep_id_t ep, bool udd_ep_wait_stall_clear(udd_ep_id_t ep, udd_callback_halt_cleared_t callback);
udd_callback_halt_cleared_t callback);
/** /**
* \brief Allows to receive or send data on an endpoint * \brief Allows to receive or send data on an endpoint
@@ -321,9 +313,8 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
* *
* \return \c 1 if function was successfully done, otherwise \c 0. * \return \c 1 if function was successfully done, otherwise \c 0.
*/ */
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, uint8_t * buf, iram_size_t buf_size, udd_callback_trans_t callback);
uint8_t * buf, iram_size_t buf_size,
udd_callback_trans_t callback);
/** /**
* \brief Aborts transfer on going on endpoint * \brief Aborts transfer on going on endpoint
* *
@@ -339,7 +330,6 @@ void udd_ep_abort(udd_ep_id_t ep);
//@} //@}
/** /**
* \name High speed test mode management * \name High speed test mode management
* *
@@ -352,7 +342,6 @@ void udd_test_mode_se0_nak(void);
void udd_test_mode_packet(void); void udd_test_mode_packet(void);
//@} //@}
/** /**
* \name UDC callbacks to provide for UDD * \name UDC callbacks to provide for UDD
* *

94
Marlin/src/HAL/DUE/usb/udi.h
View File

@@ -72,57 +72,57 @@ extern "C" {
* selected by UDC. * selected by UDC.
*/ */
typedef struct { typedef struct {
/** /**
* \brief Enable the interface. * \brief Enable the interface.
* *
* This function is called when the host selects a configuration * This function is called when the host selects a configuration
* to which this interface belongs through a Set Configuration * to which this interface belongs through a Set Configuration
* request, and when the host selects an alternate setting of * request, and when the host selects an alternate setting of
* this interface through a Set Interface request. * this interface through a Set Interface request.
* *
* \return \c 1 if function was successfully done, otherwise \c 0. * \return \c 1 if function was successfully done, otherwise \c 0.
*/ */
bool (*enable)(void); bool (*enable)(void);
/** /**
* \brief Disable the interface. * \brief Disable the interface.
* *
* This function is called when this interface is currently * This function is called when this interface is currently
* active, and * active, and
* - the host selects any configuration through a Set * - the host selects any configuration through a Set
* Configuration request, or * Configuration request, or
* - the host issues a USB reset, or * - the host issues a USB reset, or
* - the device is detached from the host (i.e. Vbus is no * - the device is detached from the host (i.e. Vbus is no
* longer present) * longer present)
*/ */
void (*disable)(void); void (*disable)(void);
/** /**
* \brief Handle a control request directed at an interface. * \brief Handle a control request directed at an interface.
* *
* This function is called when this interface is currently * This function is called when this interface is currently
* active and the host sends a SETUP request * active and the host sends a SETUP request
* with this interface as the recipient. * with this interface as the recipient.
* *
* Use udd_g_ctrlreq to decode and response to SETUP request. * Use udd_g_ctrlreq to decode and response to SETUP request.
* *
* \return \c 1 if this interface supports the SETUP request, otherwise \c 0. * \return \c 1 if this interface supports the SETUP request, otherwise \c 0.
*/ */
bool (*setup)(void); bool (*setup)(void);
/** /**
* \brief Returns the current setting of the selected interface. * \brief Returns the current setting of the selected interface.
* *
* This function is called when UDC when know alternate setting of selected interface. * This function is called when UDC when know alternate setting of selected interface.
* *
* \return alternate setting of selected interface * \return alternate setting of selected interface
*/ */
uint8_t (*getsetting)(void); uint8_t (*getsetting)(void);
/** /**
* \brief To signal that a SOF is occurred * \brief To signal that a SOF is occurred
*/ */
void (*sof_notify)(void); void (*sof_notify)(void);
} udi_api_t; } udi_api_t;
//@} //@}

10
Marlin/src/HAL/DUE/usb/udi_cdc.c
View File

@@ -457,7 +457,6 @@ void udi_cdc_data_sof_notify(void)
#endif #endif
} }
// ------------------------ // ------------------------
//------- Internal routines to control serial line //------- Internal routines to control serial line
@@ -520,7 +519,6 @@ static void udi_cdc_ctrl_state_change(uint8_t port, bool b_set, le16_t bit_mask)
udi_cdc_ctrl_state_notify(port, ep_comm); udi_cdc_ctrl_state_notify(port, ep_comm);
} }
static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep) static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep)
{ {
#if UDI_CDC_PORT_NB == 1 // To optimize code #if UDI_CDC_PORT_NB == 1 // To optimize code
@@ -542,7 +540,6 @@ static void udi_cdc_ctrl_state_notify(uint8_t port, udd_ep_id_t ep)
} }
} }
static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep) static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
{ {
uint8_t port; uint8_t port;
@@ -578,11 +575,9 @@ static void udi_cdc_serial_state_msg_sent(udd_ep_status_t status, iram_size_t n,
udi_cdc_ctrl_state_notify(port, ep); udi_cdc_ctrl_state_notify(port, ep);
} }
// ------------------------ // ------------------------
//------- Internal routines to process data transfer //------- Internal routines to process data transfer
static bool udi_cdc_rx_start(uint8_t port) static bool udi_cdc_rx_start(uint8_t port)
{ {
irqflags_t flags; irqflags_t flags;
@@ -632,7 +627,6 @@ static bool udi_cdc_rx_start(uint8_t port)
udi_cdc_data_received); udi_cdc_data_received);
} }
static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep) static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
{ {
uint8_t buf_sel_trans; uint8_t buf_sel_trans;
@@ -668,7 +662,6 @@ static void udi_cdc_data_received(udd_ep_status_t status, iram_size_t n, udd_ep_
udi_cdc_rx_start(port); udi_cdc_rx_start(port);
} }
static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep) static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)
{ {
uint8_t port; uint8_t port;
@@ -700,7 +693,6 @@ static void udi_cdc_data_sent(udd_ep_status_t status, iram_size_t n, udd_ep_id_t
udi_cdc_tx_send(port); udi_cdc_tx_send(port);
} }
static void udi_cdc_tx_send(uint8_t port) static void udi_cdc_tx_send(uint8_t port)
{ {
irqflags_t flags; irqflags_t flags;
@@ -780,11 +772,9 @@ static void udi_cdc_tx_send(uint8_t port)
udi_cdc_data_sent); udi_cdc_data_sent);
} }
// ------------------------ // ------------------------
//------- Application interface //------- Application interface
//------- Application interface //------- Application interface
void udi_cdc_ctrl_signal_dcd(bool b_set) void udi_cdc_ctrl_signal_dcd(bool b_set)

296
Marlin/src/HAL/DUE/usb/udi_cdc.h
View File

@@ -92,21 +92,20 @@ extern UDC_DESC_STORAGE udi_api_t udi_api_cdc_data;
* descriptors for the CDC Communication Class interface. * descriptors for the CDC Communication Class interface.
*/ */
typedef struct { typedef struct {
//! Standard interface descriptor //! Standard interface descriptor
usb_iface_desc_t iface; usb_iface_desc_t iface;
//! CDC Header functional descriptor //! CDC Header functional descriptor
usb_cdc_hdr_desc_t header; usb_cdc_hdr_desc_t header;
//! CDC Abstract Control Model functional descriptor //! CDC Abstract Control Model functional descriptor
usb_cdc_acm_desc_t acm; usb_cdc_acm_desc_t acm;
//! CDC Union functional descriptor //! CDC Union functional descriptor
usb_cdc_union_desc_t union_desc; usb_cdc_union_desc_t union_desc;
//! CDC Call Management functional descriptor //! CDC Call Management functional descriptor
usb_cdc_call_mgmt_desc_t call_mgmt; usb_cdc_call_mgmt_desc_t call_mgmt;
//! Notification endpoint descriptor //! Notification endpoint descriptor
usb_ep_desc_t ep_notify; usb_ep_desc_t ep_notify;
} udi_cdc_comm_desc_t; } udi_cdc_comm_desc_t;
/** /**
* \brief Data Class interface descriptor * \brief Data Class interface descriptor
* *
@@ -114,14 +113,13 @@ typedef struct {
* CDC Data Class interface. * CDC Data Class interface.
*/ */
typedef struct { typedef struct {
//! Standard interface descriptor //! Standard interface descriptor
usb_iface_desc_t iface; usb_iface_desc_t iface;
//! Data IN/OUT endpoint descriptors //! Data IN/OUT endpoint descriptors
usb_ep_desc_t ep_in; usb_ep_desc_t ep_in;
usb_ep_desc_t ep_out; usb_ep_desc_t ep_out;
} udi_cdc_data_desc_t; } udi_cdc_data_desc_t;
//! CDC communication endpoints size for all speeds //! CDC communication endpoints size for all speeds
#define UDI_CDC_COMM_EP_SIZE 64 #define UDI_CDC_COMM_EP_SIZE 64
//! CDC data endpoints size for FS speed (8B, 16B, 32B, 64B) //! CDC data endpoints size for FS speed (8B, 16B, 32B, 64B)
@@ -136,13 +134,13 @@ typedef struct {
//@{ //@{
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_0 #ifndef UDI_CDC_IAD_STRING_ID_0
#define UDI_CDC_IAD_STRING_ID_0 0 #define UDI_CDC_IAD_STRING_ID_0 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_0 #ifndef UDI_CDC_COMM_STRING_ID_0
#define UDI_CDC_COMM_STRING_ID_0 0 #define UDI_CDC_COMM_STRING_ID_0 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_0 #ifndef UDI_CDC_DATA_STRING_ID_0
#define UDI_CDC_DATA_STRING_ID_0 0 #define UDI_CDC_DATA_STRING_ID_0 0
#endif #endif
#define UDI_CDC_IAD_DESC_0 UDI_CDC_IAD_DESC(0) #define UDI_CDC_IAD_DESC_0 UDI_CDC_IAD_DESC(0)
#define UDI_CDC_COMM_DESC_0 UDI_CDC_COMM_DESC(0) #define UDI_CDC_COMM_DESC_0 UDI_CDC_COMM_DESC(0)
@@ -151,13 +149,13 @@ typedef struct {
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_1 #ifndef UDI_CDC_IAD_STRING_ID_1
#define UDI_CDC_IAD_STRING_ID_1 0 #define UDI_CDC_IAD_STRING_ID_1 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_1 #ifndef UDI_CDC_COMM_STRING_ID_1
#define UDI_CDC_COMM_STRING_ID_1 0 #define UDI_CDC_COMM_STRING_ID_1 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_1 #ifndef UDI_CDC_DATA_STRING_ID_1
#define UDI_CDC_DATA_STRING_ID_1 0 #define UDI_CDC_DATA_STRING_ID_1 0
#endif #endif
#define UDI_CDC_IAD_DESC_1 UDI_CDC_IAD_DESC(1) #define UDI_CDC_IAD_DESC_1 UDI_CDC_IAD_DESC(1)
#define UDI_CDC_COMM_DESC_1 UDI_CDC_COMM_DESC(1) #define UDI_CDC_COMM_DESC_1 UDI_CDC_COMM_DESC(1)
@@ -166,13 +164,13 @@ typedef struct {
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_2 #ifndef UDI_CDC_IAD_STRING_ID_2
#define UDI_CDC_IAD_STRING_ID_2 0 #define UDI_CDC_IAD_STRING_ID_2 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_2 #ifndef UDI_CDC_COMM_STRING_ID_2
#define UDI_CDC_COMM_STRING_ID_2 0 #define UDI_CDC_COMM_STRING_ID_2 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_2 #ifndef UDI_CDC_DATA_STRING_ID_2
#define UDI_CDC_DATA_STRING_ID_2 0 #define UDI_CDC_DATA_STRING_ID_2 0
#endif #endif
#define UDI_CDC_IAD_DESC_2 UDI_CDC_IAD_DESC(2) #define UDI_CDC_IAD_DESC_2 UDI_CDC_IAD_DESC(2)
#define UDI_CDC_COMM_DESC_2 UDI_CDC_COMM_DESC(2) #define UDI_CDC_COMM_DESC_2 UDI_CDC_COMM_DESC(2)
@@ -181,13 +179,13 @@ typedef struct {
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_3 #ifndef UDI_CDC_IAD_STRING_ID_3
#define UDI_CDC_IAD_STRING_ID_3 0 #define UDI_CDC_IAD_STRING_ID_3 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_3 #ifndef UDI_CDC_COMM_STRING_ID_3
#define UDI_CDC_COMM_STRING_ID_3 0 #define UDI_CDC_COMM_STRING_ID_3 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_3 #ifndef UDI_CDC_DATA_STRING_ID_3
#define UDI_CDC_DATA_STRING_ID_3 0 #define UDI_CDC_DATA_STRING_ID_3 0
#endif #endif
#define UDI_CDC_IAD_DESC_3 UDI_CDC_IAD_DESC(3) #define UDI_CDC_IAD_DESC_3 UDI_CDC_IAD_DESC(3)
#define UDI_CDC_COMM_DESC_3 UDI_CDC_COMM_DESC(3) #define UDI_CDC_COMM_DESC_3 UDI_CDC_COMM_DESC(3)
@@ -196,13 +194,13 @@ typedef struct {
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_4 #ifndef UDI_CDC_IAD_STRING_ID_4
#define UDI_CDC_IAD_STRING_ID_4 0 #define UDI_CDC_IAD_STRING_ID_4 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_4 #ifndef UDI_CDC_COMM_STRING_ID_4
#define UDI_CDC_COMM_STRING_ID_4 0 #define UDI_CDC_COMM_STRING_ID_4 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_4 #ifndef UDI_CDC_DATA_STRING_ID_4
#define UDI_CDC_DATA_STRING_ID_4 0 #define UDI_CDC_DATA_STRING_ID_4 0
#endif #endif
#define UDI_CDC_IAD_DESC_4 UDI_CDC_IAD_DESC(4) #define UDI_CDC_IAD_DESC_4 UDI_CDC_IAD_DESC(4)
#define UDI_CDC_COMM_DESC_4 UDI_CDC_COMM_DESC(4) #define UDI_CDC_COMM_DESC_4 UDI_CDC_COMM_DESC(4)
@@ -211,13 +209,13 @@ typedef struct {
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_5 #ifndef UDI_CDC_IAD_STRING_ID_5
#define UDI_CDC_IAD_STRING_ID_5 0 #define UDI_CDC_IAD_STRING_ID_5 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_5 #ifndef UDI_CDC_COMM_STRING_ID_5
#define UDI_CDC_COMM_STRING_ID_5 0 #define UDI_CDC_COMM_STRING_ID_5 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_5 #ifndef UDI_CDC_DATA_STRING_ID_5
#define UDI_CDC_DATA_STRING_ID_5 0 #define UDI_CDC_DATA_STRING_ID_5 0
#endif #endif
#define UDI_CDC_IAD_DESC_5 UDI_CDC_IAD_DESC(5) #define UDI_CDC_IAD_DESC_5 UDI_CDC_IAD_DESC(5)
#define UDI_CDC_COMM_DESC_5 UDI_CDC_COMM_DESC(5) #define UDI_CDC_COMM_DESC_5 UDI_CDC_COMM_DESC(5)
@@ -226,13 +224,13 @@ typedef struct {
//! By default no string associated to these interfaces //! By default no string associated to these interfaces
#ifndef UDI_CDC_IAD_STRING_ID_6 #ifndef UDI_CDC_IAD_STRING_ID_6
#define UDI_CDC_IAD_STRING_ID_6 0 #define UDI_CDC_IAD_STRING_ID_6 0
#endif #endif
#ifndef UDI_CDC_COMM_STRING_ID_6 #ifndef UDI_CDC_COMM_STRING_ID_6
#define UDI_CDC_COMM_STRING_ID_6 0 #define UDI_CDC_COMM_STRING_ID_6 0
#endif #endif
#ifndef UDI_CDC_DATA_STRING_ID_6 #ifndef UDI_CDC_DATA_STRING_ID_6
#define UDI_CDC_DATA_STRING_ID_6 0 #define UDI_CDC_DATA_STRING_ID_6 0
#endif #endif
#define UDI_CDC_IAD_DESC_6 UDI_CDC_IAD_DESC(6) #define UDI_CDC_IAD_DESC_6 UDI_CDC_IAD_DESC(6)
#define UDI_CDC_COMM_DESC_6 UDI_CDC_COMM_DESC(6) #define UDI_CDC_COMM_DESC_6 UDI_CDC_COMM_DESC(6)
@@ -240,7 +238,6 @@ typedef struct {
#define UDI_CDC_DATA_DESC_6_HS UDI_CDC_DATA_DESC_HS(6) #define UDI_CDC_DATA_DESC_6_HS UDI_CDC_DATA_DESC_HS(6)
//@} //@}
//! Content of CDC IAD interface descriptor for all speeds //! Content of CDC IAD interface descriptor for all speeds
#define UDI_CDC_IAD_DESC(port) { \ #define UDI_CDC_IAD_DESC(port) { \
.bLength = sizeof(usb_iad_desc_t),\ .bLength = sizeof(usb_iad_desc_t),\
@@ -270,7 +267,7 @@ typedef struct {
.call_mgmt.bDescriptorType = CDC_CS_INTERFACE,\ .call_mgmt.bDescriptorType = CDC_CS_INTERFACE,\
.call_mgmt.bDescriptorSubtype = CDC_SCS_CALL_MGMT,\ .call_mgmt.bDescriptorSubtype = CDC_SCS_CALL_MGMT,\
.call_mgmt.bmCapabilities = \ .call_mgmt.bmCapabilities = \
CDC_CALL_MGMT_SUPPORTED | CDC_CALL_MGMT_OVER_DCI,\ CDC_CALL_MGMT_SUPPORTED | CDC_CALL_MGMT_OVER_DCI,\
.acm.bFunctionLength = sizeof(usb_cdc_acm_desc_t),\ .acm.bFunctionLength = sizeof(usb_cdc_acm_desc_t),\
.acm.bDescriptorType = CDC_CS_INTERFACE,\ .acm.bDescriptorType = CDC_CS_INTERFACE,\
.acm.bDescriptorSubtype = CDC_SCS_ACM,\ .acm.bDescriptorSubtype = CDC_SCS_ACM,\
@@ -610,40 +607,37 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
* \subsection udi_cdc_basic_use_case_usage_code Example code * \subsection udi_cdc_basic_use_case_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable() #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
extern bool my_callback_cdc_enable(void); extern bool my_callback_cdc_enable(void);
#define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable() #define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
extern void my_callback_cdc_disable(void); extern void my_callback_cdc_disable(void);
#define UDI_CDC_LOW_RATE #define UDI_CDC_LOW_RATE
#define UDI_CDC_DEFAULT_RATE 115200 #define UDI_CDC_DEFAULT_RATE 115200
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1 #define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE #define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
#define UDI_CDC_DEFAULT_DATABITS 8 #define UDI_CDC_DEFAULT_DATABITS 8
#include "udi_cdc_conf.h" // At the end of conf_usb.h file #include "udi_cdc_conf.h" // At the end of conf_usb.h file
\endcode \endcode
* *
* Add to application C-file: * Add to application C-file:
* \code * \code
static bool my_flag_autorize_cdc_transfert = false; static bool my_flag_autorize_cdc_transfert = false;
bool my_callback_cdc_enable(void) bool my_callback_cdc_enable(void) {
{ my_flag_autorize_cdc_transfert = true;
my_flag_autorize_cdc_transfert = true; return true;
return true; }
} void my_callback_cdc_disable(void) {
void my_callback_cdc_disable(void) my_flag_autorize_cdc_transfert = false;
{ }
my_flag_autorize_cdc_transfert = false;
}
void task(void) void task(void) {
{ if (my_flag_autorize_cdc_transfert) {
if (my_flag_autorize_cdc_transfert) { udi_cdc_putc('A');
udi_cdc_putc('A'); udi_cdc_getc();
udi_cdc_getc(); }
} }
}
\endcode \endcode
* *
* \subsection udi_cdc_basic_use_case_setup_flow Workflow * \subsection udi_cdc_basic_use_case_setup_flow Workflow
@@ -652,14 +646,14 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
* - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for CDC \endcode * - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for CDC \endcode
* \note The USB serial number is mandatory when a CDC interface is used. * \note The USB serial number is mandatory when a CDC interface is used.
* - \code #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable() * - \code #define UDI_CDC_ENABLE_EXT(port) my_callback_cdc_enable()
extern bool my_callback_cdc_enable(void); \endcode extern bool my_callback_cdc_enable(void); \endcode
* \note After the device enumeration (detecting and identifying USB devices), * \note After the device enumeration (detecting and identifying USB devices),
* the USB host starts the device configuration. When the USB CDC interface * the USB host starts the device configuration. When the USB CDC interface
* from the device is accepted by the host, the USB host enables this interface and the * from the device is accepted by the host, the USB host enables this interface and the
* UDI_CDC_ENABLE_EXT() callback function is called and return true. * UDI_CDC_ENABLE_EXT() callback function is called and return true.
* Thus, when this event is received, the data transfer on CDC interface are authorized. * Thus, when this event is received, the data transfer on CDC interface are authorized.
* - \code #define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable() * - \code #define UDI_CDC_DISABLE_EXT(port) my_callback_cdc_disable()
extern void my_callback_cdc_disable(void); \endcode extern void my_callback_cdc_disable(void); \endcode
* \note When the USB device is unplugged or is reset by the USB host, the USB * \note When the USB device is unplugged or is reset by the USB host, the USB
* interface is disabled and the UDI_CDC_DISABLE_EXT() callback function * interface is disabled and the UDI_CDC_DISABLE_EXT() callback function
* is called. Thus, the data transfer must be stopped on CDC interface. * is called. Thus, the data transfer must be stopped on CDC interface.
@@ -667,19 +661,19 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
* \note Define it when the transfer CDC Device to Host is a low rate * \note Define it when the transfer CDC Device to Host is a low rate
* (<512000 bauds) to reduce CDC buffers size. * (<512000 bauds) to reduce CDC buffers size.
* - \code #define UDI_CDC_DEFAULT_RATE 115200 * - \code #define UDI_CDC_DEFAULT_RATE 115200
#define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1 #define UDI_CDC_DEFAULT_STOPBITS CDC_STOP_BITS_1
#define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE #define UDI_CDC_DEFAULT_PARITY CDC_PAR_NONE
#define UDI_CDC_DEFAULT_DATABITS 8 \endcode #define UDI_CDC_DEFAULT_DATABITS 8 \endcode
* \note Default configuration of communication port at startup. * \note Default configuration of communication port at startup.
* -# Send or wait data on CDC line: * -# Send or wait data on CDC line:
* - \code // Waits and gets a value on CDC line * - \code // Waits and gets a value on CDC line
int udi_cdc_getc(void); int udi_cdc_getc(void);
// Reads a RAM buffer on CDC line // Reads a RAM buffer on CDC line
iram_size_t udi_cdc_read_buf(int *buf, iram_size_t size); iram_size_t udi_cdc_read_buf(int *buf, iram_size_t size);
// Puts a byte on CDC line // Puts a byte on CDC line
int udi_cdc_putc(int value); int udi_cdc_putc(int value);
// Writes a RAM buffer on CDC line // Writes a RAM buffer on CDC line
iram_size_t udi_cdc_write_buf(const int *buf, iram_size_t size); \endcode iram_size_t udi_cdc_write_buf(const int *buf, iram_size_t size); \endcode
* *
* \section udi_cdc_use_cases Advanced use cases * \section udi_cdc_use_cases Advanced use cases
* For more advanced use of the UDI CDC module, see the following use cases: * For more advanced use of the UDI CDC module, see the following use cases:
@@ -713,90 +707,90 @@ iram_size_t udi_cdc_multi_write_buf(uint8_t port, const void* buf, iram_size_t s
* \subsection udi_cdc_use_case_composite_usage_code Example code * \subsection udi_cdc_use_case_composite_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_EP_CTRL_SIZE 64 #define USB_DEVICE_EP_CTRL_SIZE 64
#define USB_DEVICE_NB_INTERFACE (X+2) #define USB_DEVICE_NB_INTERFACE (X+2)
#define USB_DEVICE_MAX_EP (X+3) #define USB_DEVICE_MAX_EP (X+3)
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX #define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX #define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint #define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0 #define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 #define UDI_CDC_DATA_IFACE_NUMBER_0 X+1
#define UDI_COMPOSITE_DESC_T \ #define UDI_COMPOSITE_DESC_T \
usb_iad_desc_t udi_cdc_iad; \ usb_iad_desc_t udi_cdc_iad; \
udi_cdc_comm_desc_t udi_cdc_comm; \ udi_cdc_comm_desc_t udi_cdc_comm; \
udi_cdc_data_desc_t udi_cdc_data; \ udi_cdc_data_desc_t udi_cdc_data; \
... ...
#define UDI_COMPOSITE_DESC_FS \ #define UDI_COMPOSITE_DESC_FS \
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \ .udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \ .udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
... ...
#define UDI_COMPOSITE_DESC_HS \ #define UDI_COMPOSITE_DESC_HS \
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \ .udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \ .udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
... ...
#define UDI_COMPOSITE_API \ #define UDI_COMPOSITE_API \
&udi_api_cdc_comm, \ &udi_api_cdc_comm, \
&udi_api_cdc_data, \ &udi_api_cdc_data, \
... ...
\endcode \endcode
* *
* \subsection udi_cdc_use_case_composite_usage_flow Workflow * \subsection udi_cdc_use_case_composite_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters * -# Ensure that conf_usb.h is available and contains the following parameters
* required for a USB composite device configuration: * required for a USB composite device configuration:
* - \code // Endpoint control size, This must be: * - \code // Endpoint control size, This must be:
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM) // - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
// - 64 for a high speed device // - 64 for a high speed device
#define USB_DEVICE_EP_CTRL_SIZE 64 #define USB_DEVICE_EP_CTRL_SIZE 64
// Total Number of interfaces on this USB device. // Total Number of interfaces on this USB device.
// Add 2 for CDC. // Add 2 for CDC.
#define USB_DEVICE_NB_INTERFACE (X+2) #define USB_DEVICE_NB_INTERFACE (X+2)
// Total number of endpoints on this USB device. // Total number of endpoints on this USB device.
// This must include each endpoint for each interface. // This must include each endpoint for each interface.
// Add 3 for CDC. // Add 3 for CDC.
#define USB_DEVICE_MAX_EP (X+3) \endcode #define USB_DEVICE_MAX_EP (X+3) \endcode
* -# Ensure that conf_usb.h contains the description of * -# Ensure that conf_usb.h contains the description of
* composite device: * composite device:
* - \code // The endpoint numbers chosen by you for the CDC. * - \code // The endpoint numbers chosen by you for the CDC.
// The endpoint numbers starting from 1. // The endpoint numbers starting from 1.
#define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX #define UDI_CDC_DATA_EP_IN_0 (1 | USB_EP_DIR_IN) // TX
#define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX #define UDI_CDC_DATA_EP_OUT_0 (2 | USB_EP_DIR_OUT) // RX
#define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint #define UDI_CDC_COMM_EP_0 (3 | USB_EP_DIR_IN) // Notify endpoint
// The interface index of an interface starting from 0 // The interface index of an interface starting from 0
#define UDI_CDC_COMM_IFACE_NUMBER_0 X+0 #define UDI_CDC_COMM_IFACE_NUMBER_0 X+0
#define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 \endcode #define UDI_CDC_DATA_IFACE_NUMBER_0 X+1 \endcode
* -# Ensure that conf_usb.h contains the following parameters * -# Ensure that conf_usb.h contains the following parameters
* required for a USB composite device configuration: * required for a USB composite device configuration:
* - \code // USB Interfaces descriptor structure * - \code // USB Interfaces descriptor structure
#define UDI_COMPOSITE_DESC_T \ #define UDI_COMPOSITE_DESC_T \
... ...
usb_iad_desc_t udi_cdc_iad; \ usb_iad_desc_t udi_cdc_iad; \
udi_cdc_comm_desc_t udi_cdc_comm; \ udi_cdc_comm_desc_t udi_cdc_comm; \
udi_cdc_data_desc_t udi_cdc_data; \ udi_cdc_data_desc_t udi_cdc_data; \
... ...
// USB Interfaces descriptor value for Full Speed // USB Interfaces descriptor value for Full Speed
#define UDI_COMPOSITE_DESC_FS \ #define UDI_COMPOSITE_DESC_FS \
... ...
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \ .udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \ .udi_cdc_data = UDI_CDC_DATA_DESC_0_FS, \
... ...
// USB Interfaces descriptor value for High Speed // USB Interfaces descriptor value for High Speed
#define UDI_COMPOSITE_DESC_HS \ #define UDI_COMPOSITE_DESC_HS \
... ...
.udi_cdc_iad = UDI_CDC_IAD_DESC_0, \ .udi_cdc_iad = UDI_CDC_IAD_DESC_0, \
.udi_cdc_comm = UDI_CDC_COMM_DESC_0, \ .udi_cdc_comm = UDI_CDC_COMM_DESC_0, \
.udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \ .udi_cdc_data = UDI_CDC_DATA_DESC_0_HS, \
... ...
// USB Interface APIs // USB Interface APIs
#define UDI_COMPOSITE_API \ #define UDI_COMPOSITE_API \
... ...
&udi_api_cdc_comm, \ &udi_api_cdc_comm, \
&udi_api_cdc_data, \ &udi_api_cdc_data, \
... \endcode ... \endcode
* - \note The descriptors order given in the four lists above must be the * - \note The descriptors order given in the four lists above must be the
* same as the order defined by all interface indexes. The interface index * same as the order defined by all interface indexes. The interface index
* orders are defined through UDI_X_IFACE_NUMBER defines.\n * orders are defined through UDI_X_IFACE_NUMBER defines.\n

1
Marlin/src/HAL/DUE/usb/udi_cdc_desc.c
View File

@@ -109,7 +109,6 @@ UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
.bNumConfigurations = 1 .bNumConfigurations = 1
}; };
#ifdef USB_DEVICE_HS_SUPPORT #ifdef USB_DEVICE_HS_SUPPORT
//! USB Device Qualifier Descriptor for HS //! USB Device Qualifier Descriptor for HS
COMPILER_WORD_ALIGNED COMPILER_WORD_ALIGNED

2
Marlin/src/HAL/DUE/usb/udi_composite_desc.c
View File

@@ -93,7 +93,6 @@ UDC_DESC_STORAGE usb_dev_desc_t udc_device_desc = {
.bNumConfigurations = 1 .bNumConfigurations = 1
}; };
#ifdef USB_DEVICE_HS_SUPPORT #ifdef USB_DEVICE_HS_SUPPORT
//! USB Device Qualifier Descriptor for HS //! USB Device Qualifier Descriptor for HS
COMPILER_WORD_ALIGNED COMPILER_WORD_ALIGNED
@@ -147,7 +146,6 @@ UDC_DESC_STORAGE udc_desc_t udc_desc_hs = {
}; };
#endif #endif
/** /**
* \name UDC structures which contains all USB Device definitions * \name UDC structures which contains all USB Device definitions
*/ */

148
Marlin/src/HAL/DUE/usb/udi_msc.c
View File

@@ -86,7 +86,6 @@ UDC_DESC_STORAGE udi_api_t udi_api_msc = {
}; };
//@} //@}
/** /**
* \ingroup udi_msc_group * \ingroup udi_msc_group
* \defgroup udi_msc_group_internal Implementation of UDI MSC * \defgroup udi_msc_group_internal Implementation of UDI MSC
@@ -137,7 +136,6 @@ volatile bool udi_msc_b_reset_trans = true;
//@} //@}
/** /**
* \name Internal routines * \name Internal routines
*/ */
@@ -190,7 +188,6 @@ static void udi_msc_cbw_received(udd_ep_status_t status,
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag); static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag);
//@} //@}
/** /**
* \name Routines to process small data packet * \name Routines to process small data packet
*/ */
@@ -217,7 +214,6 @@ static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
udd_ep_id_t ep); udd_ep_id_t ep);
//@} //@}
/** /**
* \name Routines to process CSW packet * \name Routines to process CSW packet
*/ */
@@ -250,7 +246,6 @@ static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
udd_ep_id_t ep); udd_ep_id_t ep);
//@} //@}
/** /**
* \name Routines manage sense data * \name Routines manage sense data
*/ */
@@ -307,7 +302,6 @@ static void udi_msc_sense_fail_cdb_invalid(void);
static void udi_msc_sense_command_invalid(void); static void udi_msc_sense_command_invalid(void);
//@} //@}
/** /**
* \name Routines manage SCSI Commands * \name Routines manage SCSI Commands
*/ */
@@ -372,9 +366,7 @@ static void udi_msc_sbc_trans(bool b_read);
//@} //@}
bool udi_msc_enable(void) {
bool udi_msc_enable(void)
{
uint8_t lun; uint8_t lun;
udi_msc_b_trans_req = false; udi_msc_b_trans_req = false;
udi_msc_b_cbw_invalid = false; udi_msc_b_cbw_invalid = false;
@@ -397,18 +389,14 @@ bool udi_msc_enable(void)
return true; return true;
} }
void udi_msc_disable(void) {
void udi_msc_disable(void)
{
udi_msc_b_trans_req = false; udi_msc_b_trans_req = false;
udi_msc_b_ack_trans = true; udi_msc_b_ack_trans = true;
udi_msc_b_reset_trans = true; udi_msc_b_reset_trans = true;
UDI_MSC_DISABLE_EXT(); UDI_MSC_DISABLE_EXT();
} }
bool udi_msc_setup(void) {
bool udi_msc_setup(void)
{
if (Udd_setup_is_in()) { if (Udd_setup_is_in()) {
// Requests Interface GET // Requests Interface GET
if (Udd_setup_type() == USB_REQ_TYPE_CLASS) { if (Udd_setup_type() == USB_REQ_TYPE_CLASS) {
@@ -451,17 +439,14 @@ bool udi_msc_setup(void)
return false; // Not supported request return false; // Not supported request
} }
uint8_t udi_msc_getsetting(void) uint8_t udi_msc_getsetting(void) {
{
return 0; // MSC don't have multiple alternate setting return 0; // MSC don't have multiple alternate setting
} }
// ------------------------ // ------------------------
//------- Routines to process CBW packet //------- Routines to process CBW packet
static void udi_msc_cbw_invalid(void) static void udi_msc_cbw_invalid(void) {
{
if (!udi_msc_b_cbw_invalid) if (!udi_msc_b_cbw_invalid)
return; // Don't re-stall endpoint if error reset by setup return; // Don't re-stall endpoint if error reset by setup
udd_ep_set_halt(UDI_MSC_EP_OUT); udd_ep_set_halt(UDI_MSC_EP_OUT);
@@ -469,8 +454,7 @@ static void udi_msc_cbw_invalid(void)
udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_invalid); udd_ep_wait_stall_clear(UDI_MSC_EP_OUT, udi_msc_cbw_invalid);
} }
static void udi_msc_csw_invalid(void) static void udi_msc_csw_invalid(void) {
{
if (!udi_msc_b_cbw_invalid) if (!udi_msc_b_cbw_invalid)
return; // Don't re-stall endpoint if error reset by setup return; // Don't re-stall endpoint if error reset by setup
udd_ep_set_halt(UDI_MSC_EP_IN); udd_ep_set_halt(UDI_MSC_EP_IN);
@@ -478,8 +462,7 @@ static void udi_msc_csw_invalid(void)
udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_invalid); udd_ep_wait_stall_clear(UDI_MSC_EP_IN, udi_msc_csw_invalid);
} }
static void udi_msc_cbw_wait(void) static void udi_msc_cbw_wait(void) {
{
// Register buffer and callback on OUT endpoint // Register buffer and callback on OUT endpoint
if (!udd_ep_run(UDI_MSC_EP_OUT, true, if (!udd_ep_run(UDI_MSC_EP_OUT, true,
(uint8_t *) & udi_msc_cbw, (uint8_t *) & udi_msc_cbw,
@@ -490,10 +473,8 @@ static void udi_msc_cbw_wait(void)
} }
} }
static void udi_msc_cbw_received(udd_ep_status_t status, static void udi_msc_cbw_received(udd_ep_status_t status,
iram_size_t nb_received, udd_ep_id_t ep) iram_size_t nb_received, udd_ep_id_t ep) {
{
UNUSED(ep); UNUSED(ep);
// Check status of transfer // Check status of transfer
if (UDD_EP_TRANSFER_OK != status) { if (UDD_EP_TRANSFER_OK != status) {
@@ -582,9 +563,7 @@ static void udi_msc_cbw_received(udd_ep_status_t status,
} }
} }
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag) {
static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag)
{
/* /*
* The following cases should result in a phase error: * The following cases should result in a phase error:
* - Case 2: Hn < Di * - Case 2: Hn < Di
@@ -612,12 +591,10 @@ static bool udi_msc_cbw_validate(uint32_t alloc_len, uint8_t dir_flag)
return true; return true;
} }
// ------------------------ // ------------------------
//------- Routines to process small data packet //------- Routines to process small data packet
static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size) static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size) {
{
// Sends data on IN endpoint // Sends data on IN endpoint
if (!udd_ep_run(UDI_MSC_EP_IN, true, if (!udd_ep_run(UDI_MSC_EP_IN, true,
buffer, buf_size, udi_msc_data_sent)) { buffer, buf_size, udi_msc_data_sent)) {
@@ -627,10 +604,8 @@ static void udi_msc_data_send(uint8_t * buffer, uint8_t buf_size)
} }
} }
static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent, static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
udd_ep_id_t ep) udd_ep_id_t ep) {
{
UNUSED(ep); UNUSED(ep);
if (UDD_EP_TRANSFER_OK != status) { if (UDD_EP_TRANSFER_OK != status) {
// Error protocol // Error protocol
@@ -644,12 +619,10 @@ static void udi_msc_data_sent(udd_ep_status_t status, iram_size_t nb_sent,
udi_msc_csw_process(); udi_msc_csw_process();
} }
// ------------------------ // ------------------------
//------- Routines to process CSW packet //------- Routines to process CSW packet
static void udi_msc_csw_process(void) static void udi_msc_csw_process(void) {
{
if (0 != udi_msc_csw.dCSWDataResidue) { if (0 != udi_msc_csw.dCSWDataResidue) {
// Residue not NULL // Residue not NULL
// then STALL next request from USB host on corresponding endpoint // then STALL next request from USB host on corresponding endpoint
@@ -664,9 +637,7 @@ static void udi_msc_csw_process(void)
udi_msc_csw_send(); udi_msc_csw_send();
} }
void udi_msc_csw_send(void) {
void udi_msc_csw_send(void)
{
// Sends CSW on IN endpoint // Sends CSW on IN endpoint
if (!udd_ep_run(UDI_MSC_EP_IN, false, if (!udd_ep_run(UDI_MSC_EP_IN, false,
(uint8_t *) & udi_msc_csw, (uint8_t *) & udi_msc_csw,
@@ -678,10 +649,8 @@ void udi_msc_csw_send(void)
} }
} }
static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent, static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
udd_ep_id_t ep) udd_ep_id_t ep) {
{
UNUSED(ep); UNUSED(ep);
UNUSED(status); UNUSED(status);
UNUSED(nb_sent); UNUSED(nb_sent);
@@ -690,20 +659,17 @@ static void udi_msc_csw_sent(udd_ep_status_t status, iram_size_t nb_sent,
udi_msc_cbw_wait(); udi_msc_cbw_wait();
} }
// ------------------------ // ------------------------
//------- Routines manage sense data //------- Routines manage sense data
static void udi_msc_clear_sense(void) static void udi_msc_clear_sense(void) {
{
memset((uint8_t*)&udi_msc_sense, 0, sizeof(struct scsi_request_sense_data)); memset((uint8_t*)&udi_msc_sense, 0, sizeof(struct scsi_request_sense_data));
udi_msc_sense.valid_reponse_code = SCSI_SENSE_VALID | SCSI_SENSE_CURRENT; udi_msc_sense.valid_reponse_code = SCSI_SENSE_VALID | SCSI_SENSE_CURRENT;
udi_msc_sense.AddSenseLen = SCSI_SENSE_ADDL_LEN(sizeof(udi_msc_sense)); udi_msc_sense.AddSenseLen = SCSI_SENSE_ADDL_LEN(sizeof(udi_msc_sense));
} }
static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense, static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense,
uint32_t lba) uint32_t lba) {
{
udi_msc_clear_sense(); udi_msc_clear_sense();
udi_msc_csw.bCSWStatus = USB_CSW_STATUS_FAIL; udi_msc_csw.bCSWStatus = USB_CSW_STATUS_FAIL;
udi_msc_sense.sense_flag_key = sense_key; udi_msc_sense.sense_flag_key = sense_key;
@@ -715,53 +681,39 @@ static void udi_msc_sense_fail(uint8_t sense_key, uint16_t add_sense,
udi_msc_sense.AddSnsCodeQlfr = add_sense; udi_msc_sense.AddSnsCodeQlfr = add_sense;
} }
static void udi_msc_sense_pass(void) static void udi_msc_sense_pass(void) {
{
udi_msc_clear_sense(); udi_msc_clear_sense();
udi_msc_csw.bCSWStatus = USB_CSW_STATUS_PASS; udi_msc_csw.bCSWStatus = USB_CSW_STATUS_PASS;
} }
static void udi_msc_sense_fail_not_present(void) {
static void udi_msc_sense_fail_not_present(void)
{
udi_msc_sense_fail(SCSI_SK_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT, 0); udi_msc_sense_fail(SCSI_SK_NOT_READY, SCSI_ASC_MEDIUM_NOT_PRESENT, 0);
} }
static void udi_msc_sense_fail_busy_or_change(void) static void udi_msc_sense_fail_busy_or_change(void) {
{ udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION, SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0);
udi_msc_sense_fail(SCSI_SK_UNIT_ATTENTION,
SCSI_ASC_NOT_READY_TO_READY_CHANGE, 0);
} }
static void udi_msc_sense_fail_hardware(void) static void udi_msc_sense_fail_hardware(void) {
{ udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR, SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0);
udi_msc_sense_fail(SCSI_SK_HARDWARE_ERROR,
SCSI_ASC_NO_ADDITIONAL_SENSE_INFO, 0);
} }
static void udi_msc_sense_fail_protected(void) static void udi_msc_sense_fail_protected(void) {
{
udi_msc_sense_fail(SCSI_SK_DATA_PROTECT, SCSI_ASC_WRITE_PROTECTED, 0); udi_msc_sense_fail(SCSI_SK_DATA_PROTECT, SCSI_ASC_WRITE_PROTECTED, 0);
} }
static void udi_msc_sense_fail_cdb_invalid(void) static void udi_msc_sense_fail_cdb_invalid(void) {
{ udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, SCSI_ASC_INVALID_FIELD_IN_CDB, 0);
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST,
SCSI_ASC_INVALID_FIELD_IN_CDB, 0);
} }
static void udi_msc_sense_command_invalid(void) static void udi_msc_sense_command_invalid(void) {
{ udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST, SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0);
udi_msc_sense_fail(SCSI_SK_ILLEGAL_REQUEST,
SCSI_ASC_INVALID_COMMAND_OPERATION_CODE, 0);
} }
// ------------------------ // ------------------------
//------- Routines manage SCSI Commands //------- Routines manage SCSI Commands
static void udi_msc_spc_requestsense(void) static void udi_msc_spc_requestsense(void) {
{
uint8_t length = udi_msc_cbw.CDB[4]; uint8_t length = udi_msc_cbw.CDB[4];
// Can't send more than sense data length // Can't send more than sense data length
@@ -774,9 +726,7 @@ static void udi_msc_spc_requestsense(void)
udi_msc_data_send((uint8_t*)&udi_msc_sense, length); udi_msc_data_send((uint8_t*)&udi_msc_sense, length);
} }
static void udi_msc_spc_inquiry(void) {
static void udi_msc_spc_inquiry(void)
{
uint8_t length, i; uint8_t length, i;
UDC_DATA(4) UDC_DATA(4)
// Constant inquiry data for all LUNs // Constant inquiry data for all LUNs
@@ -835,9 +785,7 @@ static void udi_msc_spc_inquiry(void)
udi_msc_data_send((uint8_t *) & udi_msc_inquiry_data, length); udi_msc_data_send((uint8_t *) & udi_msc_inquiry_data, length);
} }
static bool udi_msc_spc_testunitready_global(void) {
static bool udi_msc_spc_testunitready_global(void)
{
switch (mem_test_unit_ready(udi_msc_cbw.bCBWLUN)) { switch (mem_test_unit_ready(udi_msc_cbw.bCBWLUN)) {
case CTRL_GOOD: case CTRL_GOOD:
return true; // Don't change sense data return true; // Don't change sense data
@@ -855,9 +803,7 @@ static bool udi_msc_spc_testunitready_global(void)
return false; return false;
} }
static void udi_msc_spc_testunitready(void) {
static void udi_msc_spc_testunitready(void)
{
if (udi_msc_spc_testunitready_global()) { if (udi_msc_spc_testunitready_global()) {
// LUN ready, then update sense data with status pass // LUN ready, then update sense data with status pass
udi_msc_sense_pass(); udi_msc_sense_pass();
@@ -866,9 +812,7 @@ static void udi_msc_spc_testunitready(void)
udi_msc_csw_process(); udi_msc_csw_process();
} }
static void udi_msc_spc_mode_sense(bool b_sense10) {
static void udi_msc_spc_mode_sense(bool b_sense10)
{
// Union of all mode sense structures // Union of all mode sense structures
union sense_6_10 { union sense_6_10 {
struct { struct {
@@ -943,9 +887,7 @@ static void udi_msc_spc_mode_sense(bool b_sense10)
udi_msc_data_send((uint8_t *) & sense, request_lgt); udi_msc_data_send((uint8_t *) & sense, request_lgt);
} }
static void udi_msc_spc_prevent_allow_medium_removal(void) {
static void udi_msc_spc_prevent_allow_medium_removal(void)
{
uint8_t prevent = udi_msc_cbw.CDB[4]; uint8_t prevent = udi_msc_cbw.CDB[4];
if (0 == prevent) { if (0 == prevent) {
udi_msc_sense_pass(); udi_msc_sense_pass();
@@ -955,9 +897,7 @@ static void udi_msc_spc_prevent_allow_medium_removal(void)
udi_msc_csw_process(); udi_msc_csw_process();
} }
static void udi_msc_sbc_start_stop(void) {
static void udi_msc_sbc_start_stop(void)
{
bool start = 0x1 & udi_msc_cbw.CDB[4]; bool start = 0x1 & udi_msc_cbw.CDB[4];
bool loej = 0x2 & udi_msc_cbw.CDB[4]; bool loej = 0x2 & udi_msc_cbw.CDB[4];
if (loej) { if (loej) {
@@ -967,9 +907,7 @@ static void udi_msc_sbc_start_stop(void)
udi_msc_csw_process(); udi_msc_csw_process();
} }
static void udi_msc_sbc_read_capacity(void) {
static void udi_msc_sbc_read_capacity(void)
{
UDC_BSS(4) static struct sbc_read_capacity10_data udi_msc_capacity; UDC_BSS(4) static struct sbc_read_capacity10_data udi_msc_capacity;
if (!udi_msc_cbw_validate(sizeof(udi_msc_capacity), if (!udi_msc_cbw_validate(sizeof(udi_msc_capacity),
@@ -1003,9 +941,7 @@ static void udi_msc_sbc_read_capacity(void)
sizeof(udi_msc_capacity)); sizeof(udi_msc_capacity));
} }
static void udi_msc_sbc_trans(bool b_read) {
static void udi_msc_sbc_trans(bool b_read)
{
uint32_t trans_size; uint32_t trans_size;
if (!b_read) { if (!b_read) {
@@ -1038,9 +974,7 @@ static void udi_msc_sbc_trans(bool b_read)
UDI_MSC_NOTIFY_TRANS_EXT(); UDI_MSC_NOTIFY_TRANS_EXT();
} }
bool udi_msc_process_trans(void) {
bool udi_msc_process_trans(void)
{
Ctrl_status status; Ctrl_status status;
if (!udi_msc_b_trans_req) if (!udi_msc_b_trans_req)
@@ -1084,10 +1018,8 @@ bool udi_msc_process_trans(void)
return true; return true;
} }
static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n, static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n,
udd_ep_id_t ep) udd_ep_id_t ep) {
{
UNUSED(ep); UNUSED(ep);
UNUSED(n); UNUSED(n);
// Update variable to signal the end of transfer // Update variable to signal the end of transfer
@@ -1095,10 +1027,8 @@ static void udi_msc_trans_ack(udd_ep_status_t status, iram_size_t n,
udi_msc_b_ack_trans = true; udi_msc_b_ack_trans = true;
} }
bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size, bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)) void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)) {
{
if (!udi_msc_b_ack_trans) if (!udi_msc_b_ack_trans)
return false; // No possible, transfer on going return false; // No possible, transfer on going

227
Marlin/src/HAL/DUE/usb/udi_msc.h
View File

@@ -77,9 +77,9 @@ extern UDC_DESC_STORAGE udi_api_t udi_api_msc;
//! Interface descriptor structure for MSC //! Interface descriptor structure for MSC
typedef struct { typedef struct {
usb_iface_desc_t iface; usb_iface_desc_t iface;
usb_ep_desc_t ep_in; usb_ep_desc_t ep_in;
usb_ep_desc_t ep_out; usb_ep_desc_t ep_out;
} udi_msc_desc_t; } udi_msc_desc_t;
//! By default no string associated to this interface //! By default no string associated to this interface
@@ -94,32 +94,32 @@ typedef struct {
//! Content of MSC interface descriptor for all speeds //! Content of MSC interface descriptor for all speeds
#define UDI_MSC_DESC \ #define UDI_MSC_DESC \
.iface.bLength = sizeof(usb_iface_desc_t),\ .iface.bLength = sizeof(usb_iface_desc_t),\
.iface.bDescriptorType = USB_DT_INTERFACE,\ .iface.bDescriptorType = USB_DT_INTERFACE,\
.iface.bInterfaceNumber = UDI_MSC_IFACE_NUMBER,\ .iface.bInterfaceNumber = UDI_MSC_IFACE_NUMBER,\
.iface.bAlternateSetting = 0,\ .iface.bAlternateSetting = 0,\
.iface.bNumEndpoints = 2,\ .iface.bNumEndpoints = 2,\
.iface.bInterfaceClass = MSC_CLASS,\ .iface.bInterfaceClass = MSC_CLASS,\
.iface.bInterfaceSubClass = MSC_SUBCLASS_TRANSPARENT,\ .iface.bInterfaceSubClass = MSC_SUBCLASS_TRANSPARENT,\
.iface.bInterfaceProtocol = MSC_PROTOCOL_BULK,\ .iface.bInterfaceProtocol = MSC_PROTOCOL_BULK,\
.iface.iInterface = UDI_MSC_STRING_ID,\ .iface.iInterface = UDI_MSC_STRING_ID,\
.ep_in.bLength = sizeof(usb_ep_desc_t),\ .ep_in.bLength = sizeof(usb_ep_desc_t),\
.ep_in.bDescriptorType = USB_DT_ENDPOINT,\ .ep_in.bDescriptorType = USB_DT_ENDPOINT,\
.ep_in.bEndpointAddress = UDI_MSC_EP_IN,\ .ep_in.bEndpointAddress = UDI_MSC_EP_IN,\
.ep_in.bmAttributes = USB_EP_TYPE_BULK,\ .ep_in.bmAttributes = USB_EP_TYPE_BULK,\
.ep_in.bInterval = 0,\ .ep_in.bInterval = 0,\
.ep_out.bLength = sizeof(usb_ep_desc_t),\ .ep_out.bLength = sizeof(usb_ep_desc_t),\
.ep_out.bDescriptorType = USB_DT_ENDPOINT,\ .ep_out.bDescriptorType = USB_DT_ENDPOINT,\
.ep_out.bEndpointAddress = UDI_MSC_EP_OUT,\ .ep_out.bEndpointAddress = UDI_MSC_EP_OUT,\
.ep_out.bmAttributes = USB_EP_TYPE_BULK,\ .ep_out.bmAttributes = USB_EP_TYPE_BULK,\
.ep_out.bInterval = 0, .ep_out.bInterval = 0,
//! Content of MSC interface descriptor for full speed only //! Content of MSC interface descriptor for full speed only
#define UDI_MSC_DESC_FS {\ #define UDI_MSC_DESC_FS {\
UDI_MSC_DESC \ UDI_MSC_DESC \
.ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\ .ep_in.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
.ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\ .ep_out.wMaxPacketSize = LE16(UDI_MSC_EPS_SIZE_FS),\
} }
//! Content of MSC interface descriptor for high speed only //! Content of MSC interface descriptor for high speed only
#define UDI_MSC_DESC_HS {\ #define UDI_MSC_DESC_HS {\
@@ -129,7 +129,6 @@ typedef struct {
} }
//@} //@}
/** /**
* \ingroup udi_group * \ingroup udi_group
* \defgroup udi_msc_group USB Device Interface (UDI) for Mass Storage Class (MSC) * \defgroup udi_msc_group USB Device Interface (UDI) for Mass Storage Class (MSC)
@@ -163,14 +162,13 @@ bool udi_msc_process_trans(void);
* \return \c 1 if function was successfully done, otherwise \c 0. * \return \c 1 if function was successfully done, otherwise \c 0.
*/ */
bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size, bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep)); void (*callback) (udd_ep_status_t status, iram_size_t n, udd_ep_id_t ep));
//@} //@}
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
/** /**
* \page udi_msc_quickstart Quick start guide for USB device Mass Storage module (UDI MSC) * \page udi_msc_quickstart Quick start guide for USB device Mass Storage module (UDI MSC)
* *
@@ -200,35 +198,32 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
* \subsection udi_msc_basic_use_case_usage_code Example code * \subsection udi_msc_basic_use_case_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC
#define UDI_MSC_GLOBAL_VENDOR_ID \ #define UDI_MSC_GLOBAL_VENDOR_ID \
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' ' 'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \ #define UDI_MSC_GLOBAL_PRODUCT_VERSION \
'1', '.', '0', '0' '1', '.', '0', '0'
#define UDI_MSC_ENABLE_EXT() my_callback_msc_enable() #define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
extern bool my_callback_msc_enable(void); extern bool my_callback_msc_enable(void);
#define UDI_MSC_DISABLE_EXT() my_callback_msc_disable() #define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
extern void my_callback_msc_disable(void); extern void my_callback_msc_disable(void);
#include "udi_msc_conf.h" // At the end of conf_usb.h file #include "udi_msc_conf.h" // At the end of conf_usb.h file
\endcode \endcode
* *
* Add to application C-file: * Add to application C-file:
* \code * \code
static bool my_flag_autorize_msc_transfert = false; static bool my_flag_autorize_msc_transfert = false;
bool my_callback_msc_enable(void) bool my_callback_msc_enable(void) {
{ my_flag_autorize_msc_transfert = true;
my_flag_autorize_msc_transfert = true; return true;
return true; }
} void my_callback_msc_disable(void) {
void my_callback_msc_disable(void) my_flag_autorize_msc_transfert = false;
{ }
my_flag_autorize_msc_transfert = false;
}
void task(void) void task(void) {
{ udi_msc_process_trans();
udi_msc_process_trans(); }
}
\endcode \endcode
* *
* \subsection udi_msc_basic_use_case_setup_flow Workflow * \subsection udi_msc_basic_use_case_setup_flow Workflow
@@ -237,14 +232,14 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
* - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC \endcode * - \code #define USB_DEVICE_SERIAL_NAME "12...EF" // Disk SN for MSC \endcode
* \note The USB serial number is mandatory when a MSC interface is used. * \note The USB serial number is mandatory when a MSC interface is used.
* - \code //! Vendor name and Product version of MSC interface * - \code //! Vendor name and Product version of MSC interface
#define UDI_MSC_GLOBAL_VENDOR_ID \ #define UDI_MSC_GLOBAL_VENDOR_ID \
'A', 'T', 'M', 'E', 'L', ' ', ' ', ' ' 'A', 'T', 'M', 'E', 'L', ' ', ' ', ' '
#define UDI_MSC_GLOBAL_PRODUCT_VERSION \ #define UDI_MSC_GLOBAL_PRODUCT_VERSION \
'1', '.', '0', '0' \endcode '1', '.', '0', '0' \endcode
* \note The USB MSC interface requires a vendor ID (8 ASCII characters) * \note The USB MSC interface requires a vendor ID (8 ASCII characters)
* and a product version (4 ASCII characters). * and a product version (4 ASCII characters).
* - \code #define UDI_MSC_ENABLE_EXT() my_callback_msc_enable() * - \code #define UDI_MSC_ENABLE_EXT() my_callback_msc_enable()
extern bool my_callback_msc_enable(void); \endcode extern bool my_callback_msc_enable(void); \endcode
* \note After the device enumeration (detecting and identifying USB devices), * \note After the device enumeration (detecting and identifying USB devices),
* the USB host starts the device configuration. When the USB MSC interface * the USB host starts the device configuration. When the USB MSC interface
* from the device is accepted by the host, the USB host enables this interface and the * from the device is accepted by the host, the USB host enables this interface and the
@@ -252,7 +247,7 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
* Thus, when this event is received, the tasks which call * Thus, when this event is received, the tasks which call
* udi_msc_process_trans() must be enabled. * udi_msc_process_trans() must be enabled.
* - \code #define UDI_MSC_DISABLE_EXT() my_callback_msc_disable() * - \code #define UDI_MSC_DISABLE_EXT() my_callback_msc_disable()
extern void my_callback_msc_disable(void); \endcode extern void my_callback_msc_disable(void); \endcode
* \note When the USB device is unplugged or is reset by the USB host, the USB * \note When the USB device is unplugged or is reset by the USB host, the USB
* interface is disabled and the UDI_MSC_DISABLE_EXT() callback function * interface is disabled and the UDI_MSC_DISABLE_EXT() callback function
* is called. Thus, it is recommended to disable the task which is called udi_msc_process_trans(). * is called. Thus, it is recommended to disable the task which is called udi_msc_process_trans().
@@ -261,15 +256,15 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
* must be done outside USB interrupt routine. This is done in the MSC process * must be done outside USB interrupt routine. This is done in the MSC process
* ("udi_msc_process_trans()") called by main loop: * ("udi_msc_process_trans()") called by main loop:
* - \code * void task(void) { * - \code * void task(void) {
udi_msc_process_trans(); udi_msc_process_trans();
} \endcode } \endcode
* -# The MSC speed depends on task periodicity. To get the best speed * -# The MSC speed depends on task periodicity. To get the best speed
* the notification callback "UDI_MSC_NOTIFY_TRANS_EXT" can be used to wakeup * the notification callback "UDI_MSC_NOTIFY_TRANS_EXT" can be used to wakeup
* this task (Example, through a mutex): * this task (Example, through a mutex):
* - \code #define UDI_MSC_NOTIFY_TRANS_EXT() msc_notify_trans() * - \code #define UDI_MSC_NOTIFY_TRANS_EXT() msc_notify_trans()
void msc_notify_trans(void) { void msc_notify_trans(void) {
wakeup_my_task(); wakeup_my_task();
} \endcode } \endcode
* *
* \section udi_msc_use_cases Advanced use cases * \section udi_msc_use_cases Advanced use cases
* For more advanced use of the UDI MSC module, see the following use cases: * For more advanced use of the UDI MSC module, see the following use cases:
@@ -302,72 +297,72 @@ bool udi_msc_trans_block(bool b_read, uint8_t * block, iram_size_t block_size,
* \subsection udi_msc_use_case_composite_usage_code Example code * \subsection udi_msc_use_case_composite_usage_code Example code
* Content of conf_usb.h: * Content of conf_usb.h:
* \code * \code
#define USB_DEVICE_EP_CTRL_SIZE 64 #define USB_DEVICE_EP_CTRL_SIZE 64
#define USB_DEVICE_NB_INTERFACE (X+1) #define USB_DEVICE_NB_INTERFACE (X+1)
#define USB_DEVICE_MAX_EP (X+2) #define USB_DEVICE_MAX_EP (X+2)
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN) #define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT) #define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
#define UDI_MSC_IFACE_NUMBER X #define UDI_MSC_IFACE_NUMBER X
#define UDI_COMPOSITE_DESC_T \ #define UDI_COMPOSITE_DESC_T \
udi_msc_desc_t udi_msc; \ udi_msc_desc_t udi_msc; \
... ...
#define UDI_COMPOSITE_DESC_FS \ #define UDI_COMPOSITE_DESC_FS \
.udi_msc = UDI_MSC_DESC, \ .udi_msc = UDI_MSC_DESC, \
... ...
#define UDI_COMPOSITE_DESC_HS \ #define UDI_COMPOSITE_DESC_HS \
.udi_msc = UDI_MSC_DESC, \ .udi_msc = UDI_MSC_DESC, \
... ...
#define UDI_COMPOSITE_API \ #define UDI_COMPOSITE_API \
&udi_api_msc, \ &udi_api_msc, \
... ...
\endcode \endcode
* *
* \subsection udi_msc_use_case_composite_usage_flow Workflow * \subsection udi_msc_use_case_composite_usage_flow Workflow
* -# Ensure that conf_usb.h is available and contains the following parameters * -# Ensure that conf_usb.h is available and contains the following parameters
* required for a USB composite device configuration: * required for a USB composite device configuration:
* - \code // Endpoint control size, This must be: * - \code // Endpoint control size, This must be:
// - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM) // - 8, 16, 32 or 64 for full speed device (8 is recommended to save RAM)
// - 64 for a high speed device // - 64 for a high speed device
#define USB_DEVICE_EP_CTRL_SIZE 64 #define USB_DEVICE_EP_CTRL_SIZE 64
// Total Number of interfaces on this USB device. // Total Number of interfaces on this USB device.
// Add 1 for MSC. // Add 1 for MSC.
#define USB_DEVICE_NB_INTERFACE (X+1) #define USB_DEVICE_NB_INTERFACE (X+1)
// Total number of endpoints on this USB device. // Total number of endpoints on this USB device.
// This must include each endpoint for each interface. // This must include each endpoint for each interface.
// Add 2 for MSC. // Add 2 for MSC.
#define USB_DEVICE_MAX_EP (X+2) \endcode #define USB_DEVICE_MAX_EP (X+2) \endcode
* -# Ensure that conf_usb.h contains the description of * -# Ensure that conf_usb.h contains the description of
* composite device: * composite device:
* - \code // The endpoint numbers chosen by you for the MSC. * - \code // The endpoint numbers chosen by you for the MSC.
// The endpoint numbers starting from 1. // The endpoint numbers starting from 1.
#define UDI_MSC_EP_IN (X | USB_EP_DIR_IN) #define UDI_MSC_EP_IN (X | USB_EP_DIR_IN)
#define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT) #define UDI_MSC_EP_OUT (Y | USB_EP_DIR_OUT)
// The interface index of an interface starting from 0 // The interface index of an interface starting from 0
#define UDI_MSC_IFACE_NUMBER X \endcode #define UDI_MSC_IFACE_NUMBER X \endcode
* -# Ensure that conf_usb.h contains the following parameters * -# Ensure that conf_usb.h contains the following parameters
* required for a USB composite device configuration: * required for a USB composite device configuration:
* - \code // USB Interfaces descriptor structure * - \code // USB Interfaces descriptor structure
#define UDI_COMPOSITE_DESC_T \ #define UDI_COMPOSITE_DESC_T \
... ...
udi_msc_desc_t udi_msc; \ udi_msc_desc_t udi_msc; \
... ...
// USB Interfaces descriptor value for Full Speed // USB Interfaces descriptor value for Full Speed
#define UDI_COMPOSITE_DESC_FS \ #define UDI_COMPOSITE_DESC_FS \
... ...
.udi_msc = UDI_MSC_DESC_FS, \ .udi_msc = UDI_MSC_DESC_FS, \
... ...
// USB Interfaces descriptor value for High Speed // USB Interfaces descriptor value for High Speed
#define UDI_COMPOSITE_DESC_HS \ #define UDI_COMPOSITE_DESC_HS \
... ...
.udi_msc = UDI_MSC_DESC_HS, \ .udi_msc = UDI_MSC_DESC_HS, \
... ...
// USB Interface APIs // USB Interface APIs
#define UDI_COMPOSITE_API \ #define UDI_COMPOSITE_API \
... ...
&udi_api_msc, \ &udi_api_msc, \
... \endcode ... \endcode
* - \note The descriptors order given in the four lists above must be the * - \note The descriptors order given in the four lists above must be the
* same as the order defined by all interface indexes. The interface index * same as the order defined by all interface indexes. The interface index
* orders are defined through UDI_X_IFACE_NUMBER defines. * orders are defined through UDI_X_IFACE_NUMBER defines.

46
Marlin/src/HAL/DUE/usb/uotghs_device_due.c
View File

@@ -276,7 +276,6 @@
# endif # endif
#endif #endif
/** /**
* \name Power management routine. * \name Power management routine.
*/ */
@@ -293,7 +292,6 @@ static bool udd_b_idle;
//! State of sleep manager //! State of sleep manager
static bool udd_b_sleep_initialized = false; static bool udd_b_sleep_initialized = false;
/*! \brief Authorize or not the CPU powerdown mode /*! \brief Authorize or not the CPU powerdown mode
* *
* \param b_enable true to authorize idle mode * \param b_enable true to authorize idle mode
@@ -321,7 +319,6 @@ static void udd_sleep_mode(bool b_idle)
//@} //@}
/** /**
* \name Control endpoint low level management routine. * \name Control endpoint low level management routine.
* *
@@ -393,7 +390,6 @@ static void udd_ctrl_send_zlp_out(void);
//! \brief Call callback associated to setup request //! \brief Call callback associated to setup request
static void udd_ctrl_endofrequest(void); static void udd_ctrl_endofrequest(void);
/** /**
* \brief Main interrupt routine for control endpoint * \brief Main interrupt routine for control endpoint
* *
@@ -405,7 +401,6 @@ static bool udd_ctrl_interrupt(void);
//@} //@}
/** /**
* \name Management of bulk/interrupt/isochronous endpoints * \name Management of bulk/interrupt/isochronous endpoints
* *
@@ -443,7 +438,6 @@ typedef struct {
uint8_t stall_requested:1; uint8_t stall_requested:1;
} udd_ep_job_t; } udd_ep_job_t;
//! Array to register a job on bulk/interrupt/isochronous endpoint //! Array to register a job on bulk/interrupt/isochronous endpoint
static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP]; static udd_ep_job_t udd_ep_job[USB_DEVICE_MAX_EP];
@@ -505,7 +499,6 @@ static bool udd_ep_interrupt(void);
#endif // (0!=USB_DEVICE_MAX_EP) #endif // (0!=USB_DEVICE_MAX_EP)
//@} //@}
// ------------------------ // ------------------------
//--- INTERNAL ROUTINES TO MANAGED GLOBAL EVENTS //--- INTERNAL ROUTINES TO MANAGED GLOBAL EVENTS
@@ -642,13 +635,11 @@ udd_interrupt_sof_end:
return; return;
} }
bool udd_include_vbus_monitoring(void) bool udd_include_vbus_monitoring(void)
{ {
return true; return true;
} }
void udd_enable(void) void udd_enable(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -735,7 +726,6 @@ void udd_enable(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
void udd_disable(void) void udd_disable(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -776,7 +766,6 @@ void udd_disable(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
void udd_attach(void) void udd_attach(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -817,7 +806,6 @@ void udd_attach(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
void udd_detach(void) void udd_detach(void)
{ {
otg_unfreeze_clock(); otg_unfreeze_clock();
@@ -828,7 +816,6 @@ void udd_detach(void)
udd_sleep_mode(false); udd_sleep_mode(false);
} }
bool udd_is_high_speed(void) bool udd_is_high_speed(void)
{ {
#ifdef USB_DEVICE_HS_SUPPORT #ifdef USB_DEVICE_HS_SUPPORT
@@ -838,7 +825,6 @@ bool udd_is_high_speed(void)
#endif #endif
} }
void udd_set_address(uint8_t address) void udd_set_address(uint8_t address)
{ {
udd_disable_address(); udd_disable_address();
@@ -846,13 +832,11 @@ void udd_set_address(uint8_t address)
udd_enable_address(); udd_enable_address();
} }
uint8_t udd_getaddress(void) uint8_t udd_getaddress(void)
{ {
return udd_get_configured_address(); return udd_get_configured_address();
} }
uint16_t udd_get_frame_number(void) uint16_t udd_get_frame_number(void)
{ {
return udd_frame_number(); return udd_frame_number();
@@ -875,14 +859,12 @@ void udd_send_remotewakeup(void)
} }
} }
void udd_set_setup_payload(uint8_t *payload, uint16_t payload_size) void udd_set_setup_payload(uint8_t *payload, uint16_t payload_size)
{ {
udd_g_ctrlreq.payload = payload; udd_g_ctrlreq.payload = payload;
udd_g_ctrlreq.payload_size = payload_size; udd_g_ctrlreq.payload_size = payload_size;
} }
#if (0 != USB_DEVICE_MAX_EP) #if (0 != USB_DEVICE_MAX_EP)
bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes, bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
uint16_t MaxEndpointSize) uint16_t MaxEndpointSize)
@@ -1006,7 +988,6 @@ bool udd_ep_alloc(udd_ep_id_t ep, uint8_t bmAttributes,
return true; return true;
} }
void udd_ep_free(udd_ep_id_t ep) void udd_ep_free(udd_ep_id_t ep)
{ {
uint8_t ep_index = ep & USB_EP_ADDR_MASK; uint8_t ep_index = ep & USB_EP_ADDR_MASK;
@@ -1019,14 +1000,12 @@ void udd_ep_free(udd_ep_id_t ep)
udd_ep_job[ep_index - 1].stall_requested = false; udd_ep_job[ep_index - 1].stall_requested = false;
} }
bool udd_ep_is_halted(udd_ep_id_t ep) bool udd_ep_is_halted(udd_ep_id_t ep)
{ {
uint8_t ep_index = ep & USB_EP_ADDR_MASK; uint8_t ep_index = ep & USB_EP_ADDR_MASK;
return Is_udd_endpoint_stall_requested(ep_index); return Is_udd_endpoint_stall_requested(ep_index);
} }
bool udd_ep_set_halt(udd_ep_id_t ep) bool udd_ep_set_halt(udd_ep_id_t ep)
{ {
uint8_t ep_index = ep & USB_EP_ADDR_MASK; uint8_t ep_index = ep & USB_EP_ADDR_MASK;
@@ -1067,7 +1046,6 @@ bool udd_ep_set_halt(udd_ep_id_t ep)
return true; return true;
} }
bool udd_ep_clear_halt(udd_ep_id_t ep) bool udd_ep_clear_halt(udd_ep_id_t ep)
{ {
uint8_t ep_index = ep & USB_EP_ADDR_MASK; uint8_t ep_index = ep & USB_EP_ADDR_MASK;
@@ -1108,7 +1086,6 @@ bool udd_ep_clear_halt(udd_ep_id_t ep)
return true; return true;
} }
bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket, bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
uint8_t * buf, iram_size_t buf_size, uint8_t * buf, iram_size_t buf_size,
udd_callback_trans_t callback) udd_callback_trans_t callback)
@@ -1175,7 +1152,6 @@ bool udd_ep_run(udd_ep_id_t ep, bool b_shortpacket,
#endif #endif
} }
void udd_ep_abort(udd_ep_id_t ep) void udd_ep_abort(udd_ep_id_t ep)
{ {
uint8_t ep_index = ep & USB_EP_ADDR_MASK; uint8_t ep_index = ep & USB_EP_ADDR_MASK;
@@ -1204,7 +1180,6 @@ void udd_ep_abort(udd_ep_id_t ep)
udd_ep_abort_job(ep); udd_ep_abort_job(ep);
} }
bool udd_ep_wait_stall_clear(udd_ep_id_t ep, bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
udd_callback_halt_cleared_t callback) udd_callback_halt_cleared_t callback)
{ {
@@ -1239,7 +1214,6 @@ bool udd_ep_wait_stall_clear(udd_ep_id_t ep,
} }
#endif // (0 != USB_DEVICE_MAX_EP) #endif // (0 != USB_DEVICE_MAX_EP)
#ifdef USB_DEVICE_HS_SUPPORT #ifdef USB_DEVICE_HS_SUPPORT
void udd_test_mode_j(void) void udd_test_mode_j(void)
@@ -1248,20 +1222,17 @@ void udd_test_mode_j(void)
udd_enable_hs_test_mode_j(); udd_enable_hs_test_mode_j();
} }
void udd_test_mode_k(void) void udd_test_mode_k(void)
{ {
udd_enable_hs_test_mode(); udd_enable_hs_test_mode();
udd_enable_hs_test_mode_k(); udd_enable_hs_test_mode_k();
} }
void udd_test_mode_se0_nak(void) void udd_test_mode_se0_nak(void)
{ {
udd_enable_hs_test_mode(); udd_enable_hs_test_mode();
} }
void udd_test_mode_packet(void) void udd_test_mode_packet(void)
{ {
uint8_t i; uint8_t i;
@@ -1305,8 +1276,6 @@ void udd_test_mode_packet(void)
} }
#endif // USB_DEVICE_HS_SUPPORT #endif // USB_DEVICE_HS_SUPPORT
// ------------------------ // ------------------------
//--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT //--- INTERNAL ROUTINES TO MANAGED THE CONTROL ENDPOINT
@@ -1356,7 +1325,6 @@ static void udd_ctrl_init(void)
udd_ep_control_state = UDD_EPCTRL_SETUP; udd_ep_control_state = UDD_EPCTRL_SETUP;
} }
static void udd_ctrl_setup_received(void) static void udd_ctrl_setup_received(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -1418,7 +1386,6 @@ static void udd_ctrl_setup_received(void)
} }
} }
static void udd_ctrl_in_sent(void) static void udd_ctrl_in_sent(void)
{ {
static bool b_shortpacket = false; static bool b_shortpacket = false;
@@ -1502,7 +1469,6 @@ static void udd_ctrl_in_sent(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
static void udd_ctrl_out_received(void) static void udd_ctrl_out_received(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -1593,7 +1559,6 @@ static void udd_ctrl_out_received(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
static void udd_ctrl_underflow(void) static void udd_ctrl_underflow(void)
{ {
if (Is_udd_out_received(0)) if (Is_udd_out_received(0))
@@ -1610,7 +1575,6 @@ static void udd_ctrl_underflow(void)
} }
} }
static void udd_ctrl_overflow(void) static void udd_ctrl_overflow(void)
{ {
if (Is_udd_in_send(0)) if (Is_udd_in_send(0))
@@ -1626,7 +1590,6 @@ static void udd_ctrl_overflow(void)
} }
} }
static void udd_ctrl_stall_data(void) static void udd_ctrl_stall_data(void)
{ {
// Stall all packets on IN & OUT control endpoint // Stall all packets on IN & OUT control endpoint
@@ -1634,7 +1597,6 @@ static void udd_ctrl_stall_data(void)
udd_enable_stall_handshake(0); udd_enable_stall_handshake(0);
} }
static void udd_ctrl_send_zlp_in(void) static void udd_ctrl_send_zlp_in(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -1652,7 +1614,6 @@ static void udd_ctrl_send_zlp_in(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
static void udd_ctrl_send_zlp_out(void) static void udd_ctrl_send_zlp_out(void)
{ {
irqflags_t flags; irqflags_t flags;
@@ -1668,7 +1629,6 @@ static void udd_ctrl_send_zlp_out(void)
cpu_irq_restore(flags); cpu_irq_restore(flags);
} }
static void udd_ctrl_endofrequest(void) static void udd_ctrl_endofrequest(void)
{ {
// If a callback is registered then call it // If a callback is registered then call it
@@ -1677,7 +1637,6 @@ static void udd_ctrl_endofrequest(void)
} }
} }
static bool udd_ctrl_interrupt(void) static bool udd_ctrl_interrupt(void)
{ {
@@ -1728,7 +1687,6 @@ static bool udd_ctrl_interrupt(void)
return false; return false;
} }
// ------------------------ // ------------------------
//--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS //--- INTERNAL ROUTINES TO MANAGED THE BULK/INTERRUPT/ISOCHRONOUS ENDPOINTS
@@ -1743,7 +1701,6 @@ static void udd_ep_job_table_reset(void)
} }
} }
static void udd_ep_job_table_kill(void) static void udd_ep_job_table_kill(void)
{ {
uint8_t i; uint8_t i;
@@ -1754,7 +1711,6 @@ static void udd_ep_job_table_kill(void)
} }
} }
static void udd_ep_abort_job(udd_ep_id_t ep) static void udd_ep_abort_job(udd_ep_id_t ep)
{ {
ep &= USB_EP_ADDR_MASK; ep &= USB_EP_ADDR_MASK;
@@ -1763,7 +1719,6 @@ static void udd_ep_abort_job(udd_ep_id_t ep)
udd_ep_finish_job(&udd_ep_job[ep - 1], true, ep); udd_ep_finish_job(&udd_ep_job[ep - 1], true, ep);
} }
static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort, uint8_t ep_num) static void udd_ep_finish_job(udd_ep_job_t * ptr_job, bool b_abort, uint8_t ep_num)
{ {
if (ptr_job->busy == false) { if (ptr_job->busy == false) {
@@ -1834,7 +1789,6 @@ static void udd_ep_trans_done(udd_ep_id_t ep)
udd_dma_ctrl |= UOTGHS_DEVDMACONTROL_END_BUFFIT | udd_dma_ctrl |= UOTGHS_DEVDMACONTROL_END_BUFFIT |
UOTGHS_DEVDMACONTROL_CHANN_ENB; UOTGHS_DEVDMACONTROL_CHANN_ENB;
// Disable IRQs to have a short sequence // Disable IRQs to have a short sequence
// between read of EOT_STA and DMA enable // between read of EOT_STA and DMA enable
flags = cpu_irq_save(); flags = cpu_irq_save();

6
Marlin/src/HAL/DUE/usb/uotghs_device_due.h
View File

@@ -129,7 +129,6 @@ extern "C" {
#define Is_udd_vbus_transition() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSTI)) #define Is_udd_vbus_transition() (Tst_bits(UOTGHS->UOTGHS_SR, UOTGHS_SR_VBUSTI))
//! @} //! @}
//! @name UOTGHS device attach control //! @name UOTGHS device attach control
//! These macros manage the UOTGHS Device attach. //! These macros manage the UOTGHS Device attach.
//! @{ //! @{
@@ -141,7 +140,6 @@ extern "C" {
#define Is_udd_detached() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_DETACH)) #define Is_udd_detached() (Tst_bits(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_DETACH))
//! @} //! @}
//! @name UOTGHS device bus events control //! @name UOTGHS device bus events control
//! These macros manage the UOTGHS Device bus events. //! These macros manage the UOTGHS Device bus events.
//! @{ //! @{
@@ -246,7 +244,6 @@ extern "C" {
#define udd_get_configured_address() (Rd_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_UADD_Msk)) #define udd_get_configured_address() (Rd_bitfield(UOTGHS->UOTGHS_DEVCTRL, UOTGHS_DEVCTRL_UADD_Msk))
//! @} //! @}
//! @name UOTGHS Device endpoint drivers //! @name UOTGHS Device endpoint drivers
//! These macros manage the common features of the endpoints. //! These macros manage the common features of the endpoints.
//! @{ //! @{
@@ -330,7 +327,6 @@ extern "C" {
#define udd_data_toggle(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_DTSEQ_Msk)) #define udd_data_toggle(ep) (Rd_bitfield(UOTGHS_ARRAY(UOTGHS_DEVEPTISR[0], ep), UOTGHS_DEVEPTISR_DTSEQ_Msk))
//! @} //! @}
//! @name UOTGHS Device control endpoint //! @name UOTGHS Device control endpoint
//! These macros control the endpoints. //! These macros control the endpoints.
//! @{ //! @{
@@ -530,7 +526,6 @@ extern "C" {
//! Tests if IN sending interrupt is enabled //! Tests if IN sending interrupt is enabled
#define Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_TXINE)) #define Is_udd_in_send_interrupt_enabled(ep) (Tst_bits(UOTGHS_ARRAY(UOTGHS_DEVEPTIMR[0], ep), UOTGHS_DEVEPTIMR_TXINE))
//! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint. //! Get 64-, 32-, 16- or 8-bit access to FIFO data register of selected endpoint.
//! @param ep Endpoint of which to access FIFO data register //! @param ep Endpoint of which to access FIFO data register
//! @param scale Data scale in bits: 64, 32, 16 or 8 //! @param scale Data scale in bits: 64, 32, 16 or 8
@@ -652,7 +647,6 @@ typedef struct {
//! @} //! @}
//! @} //! @}
/// @cond 0 /// @cond 0
/**INDENT-OFF**/ /**INDENT-OFF**/
#ifdef __cplusplus #ifdef __cplusplus

29
Marlin/src/HAL/DUE/usb/uotghs_otg.h
View File

@@ -53,7 +53,6 @@
extern "C" { extern "C" {
#endif #endif
//! \ingroup usb_group //! \ingroup usb_group
//! \defgroup otg_group UOTGHS OTG Driver //! \defgroup otg_group UOTGHS OTG Driver
//! UOTGHS low-level driver for OTG features //! UOTGHS low-level driver for OTG features
@@ -74,7 +73,6 @@ bool otg_dual_enable(void);
*/ */
void otg_dual_disable(void); void otg_dual_disable(void);
//! @name UOTGHS OTG ID pin management //! @name UOTGHS OTG ID pin management
//! The ID pin come from the USB OTG connector (A and B receptable) and //! The ID pin come from the USB OTG connector (A and B receptable) and
//! allows to select the USB mode host or device. //! allows to select the USB mode host or device.
@@ -127,13 +125,13 @@ void otg_dual_disable(void);
//! These macros allows to enable/disable pad and UOTGHS hardware //! These macros allows to enable/disable pad and UOTGHS hardware
//! @{ //! @{
//! Reset USB macro //! Reset USB macro
#define otg_reset() \ #define otg_reset() \
do { \ do { \
UOTGHS->UOTGHS_CTRL = 0; \ UOTGHS->UOTGHS_CTRL = 0; \
while( UOTGHS->UOTGHS_SR & 0x3FFF) {\ while( UOTGHS->UOTGHS_SR & 0x3FFF) { \
UOTGHS->UOTGHS_SCR = 0xFFFFFFFF;\ UOTGHS->UOTGHS_SCR = 0xFFFFFFFF; \
} \ } \
} while (0) } while (0)
//! Enable USB macro //! Enable USB macro
#define otg_enable() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_USBE)) #define otg_enable() (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_USBE))
//! Disable USB macro //! Disable USB macro
@@ -157,15 +155,14 @@ void otg_dual_disable(void);
//! Configure time-out of specified OTG timer //! Configure time-out of specified OTG timer
#define otg_configure_timeout(timer, timeout) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\ #define otg_configure_timeout(timer, timeout) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\ Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk, timeout),\ Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk, timeout),\
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK)) Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK))
//! Get configured time-out of specified OTG timer //! Get configured time-out of specified OTG timer
#define otg_get_timeout(timer) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\ #define otg_get_timeout(timer) (Set_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\ Wr_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMPAGE_Msk, timer),\
Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\ Clr_bits(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_UNLOCK),\
Rd_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk)) Rd_bitfield(UOTGHS->UOTGHS_CTRL, UOTGHS_CTRL_TIMVALUE_Msk))
//! Get the dual-role device state of the internal USB finite state machine of the UOTGHS controller //! Get the dual-role device state of the internal USB finite state machine of the UOTGHS controller
#define otg_get_fsm_drd_state() (Rd_bitfield(UOTGHS->UOTGHS_FSM, UOTGHS_FSM_DRDSTATE_Msk)) #define otg_get_fsm_drd_state() (Rd_bitfield(UOTGHS->UOTGHS_FSM, UOTGHS_FSM_DRDSTATE_Msk))

270
Marlin/src/HAL/DUE/usb/usb_protocol.h
View File

@@ -108,17 +108,17 @@
* \brief Standard USB requests (bRequest) * \brief Standard USB requests (bRequest)
*/ */
enum usb_reqid { enum usb_reqid {
USB_REQ_GET_STATUS = 0, USB_REQ_GET_STATUS = 0,
USB_REQ_CLEAR_FEATURE = 1, USB_REQ_CLEAR_FEATURE = 1,
USB_REQ_SET_FEATURE = 3, USB_REQ_SET_FEATURE = 3,
USB_REQ_SET_ADDRESS = 5, USB_REQ_SET_ADDRESS = 5,
USB_REQ_GET_DESCRIPTOR = 6, USB_REQ_GET_DESCRIPTOR = 6,
USB_REQ_SET_DESCRIPTOR = 7, USB_REQ_SET_DESCRIPTOR = 7,
USB_REQ_GET_CONFIGURATION = 8, USB_REQ_GET_CONFIGURATION = 8,
USB_REQ_SET_CONFIGURATION = 9, USB_REQ_SET_CONFIGURATION = 9,
USB_REQ_GET_INTERFACE = 10, USB_REQ_GET_INTERFACE = 10,
USB_REQ_SET_INTERFACE = 11, USB_REQ_SET_INTERFACE = 11,
USB_REQ_SYNCH_FRAME = 12, USB_REQ_SYNCH_FRAME = 12,
}; };
/** /**
@@ -126,9 +126,9 @@ enum usb_reqid {
* *
*/ */
enum usb_device_status { enum usb_device_status {
USB_DEV_STATUS_BUS_POWERED = 0, USB_DEV_STATUS_BUS_POWERED = 0,
USB_DEV_STATUS_SELF_POWERED = 1, USB_DEV_STATUS_SELF_POWERED = 1,
USB_DEV_STATUS_REMOTEWAKEUP = 2 USB_DEV_STATUS_REMOTEWAKEUP = 2
}; };
/** /**
@@ -136,7 +136,7 @@ enum usb_device_status {
* *
*/ */
enum usb_interface_status { enum usb_interface_status {
USB_IFACE_STATUS_RESERVED = 0 USB_IFACE_STATUS_RESERVED = 0
}; };
/** /**
@@ -144,7 +144,7 @@ enum usb_interface_status {
* *
*/ */
enum usb_endpoint_status { enum usb_endpoint_status {
USB_EP_STATUS_HALTED = 1, USB_EP_STATUS_HALTED = 1,
}; };
/** /**
@@ -153,11 +153,11 @@ enum usb_endpoint_status {
* \note valid for SetFeature request. * \note valid for SetFeature request.
*/ */
enum usb_device_feature { enum usb_device_feature {
USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled USB_DEV_FEATURE_REMOTE_WAKEUP = 1, //!< Remote wakeup enabled
USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode USB_DEV_FEATURE_TEST_MODE = 2, //!< USB test mode
USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3, USB_DEV_FEATURE_OTG_B_HNP_ENABLE = 3,
USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4, USB_DEV_FEATURE_OTG_A_HNP_SUPPORT = 4,
USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5 USB_DEV_FEATURE_OTG_A_ALT_HNP_SUPPORT = 5
}; };
/** /**
@@ -166,54 +166,54 @@ enum usb_device_feature {
* \note valid for USB_DEV_FEATURE_TEST_MODE request. * \note valid for USB_DEV_FEATURE_TEST_MODE request.
*/ */
enum usb_device_hs_test_mode { enum usb_device_hs_test_mode {
USB_DEV_TEST_MODE_J = 1, USB_DEV_TEST_MODE_J = 1,
USB_DEV_TEST_MODE_K = 2, USB_DEV_TEST_MODE_K = 2,
USB_DEV_TEST_MODE_SE0_NAK = 3, USB_DEV_TEST_MODE_SE0_NAK = 3,
USB_DEV_TEST_MODE_PACKET = 4, USB_DEV_TEST_MODE_PACKET = 4,
USB_DEV_TEST_MODE_FORCE_ENABLE = 5, USB_DEV_TEST_MODE_FORCE_ENABLE = 5,
}; };
/** /**
* \brief Standard USB endpoint feature/status flags * \brief Standard USB endpoint feature/status flags
*/ */
enum usb_endpoint_feature { enum usb_endpoint_feature {
USB_EP_FEATURE_HALT = 0, USB_EP_FEATURE_HALT = 0,
}; };
/** /**
* \brief Standard USB Test Mode Selectors * \brief Standard USB Test Mode Selectors
*/ */
enum usb_test_mode_selector { enum usb_test_mode_selector {
USB_TEST_J = 0x01, USB_TEST_J = 0x01,
USB_TEST_K = 0x02, USB_TEST_K = 0x02,
USB_TEST_SE0_NAK = 0x03, USB_TEST_SE0_NAK = 0x03,
USB_TEST_PACKET = 0x04, USB_TEST_PACKET = 0x04,
USB_TEST_FORCE_ENABLE = 0x05, USB_TEST_FORCE_ENABLE = 0x05,
}; };
/** /**
* \brief Standard USB descriptor types * \brief Standard USB descriptor types
*/ */
enum usb_descriptor_type { enum usb_descriptor_type {
USB_DT_DEVICE = 1, USB_DT_DEVICE = 1,
USB_DT_CONFIGURATION = 2, USB_DT_CONFIGURATION = 2,
USB_DT_STRING = 3, USB_DT_STRING = 3,
USB_DT_INTERFACE = 4, USB_DT_INTERFACE = 4,
USB_DT_ENDPOINT = 5, USB_DT_ENDPOINT = 5,
USB_DT_DEVICE_QUALIFIER = 6, USB_DT_DEVICE_QUALIFIER = 6,
USB_DT_OTHER_SPEED_CONFIGURATION = 7, USB_DT_OTHER_SPEED_CONFIGURATION = 7,
USB_DT_INTERFACE_POWER = 8, USB_DT_INTERFACE_POWER = 8,
USB_DT_OTG = 9, USB_DT_OTG = 9,
USB_DT_IAD = 0x0B, USB_DT_IAD = 0x0B,
USB_DT_BOS = 0x0F, USB_DT_BOS = 0x0F,
USB_DT_DEVICE_CAPABILITY = 0x10, USB_DT_DEVICE_CAPABILITY = 0x10,
}; };
/** /**
* \brief USB Device Capability types * \brief USB Device Capability types
*/ */
enum usb_capability_type { enum usb_capability_type {
USB_DC_USB20_EXTENSION = 0x02, USB_DC_USB20_EXTENSION = 0x02,
}; };
/** /**
@@ -221,7 +221,7 @@ enum usb_capability_type {
* To fill bmAttributes field of usb_capa_ext_desc_t structure. * To fill bmAttributes field of usb_capa_ext_desc_t structure.
*/ */
enum usb_capability_extension_attr { enum usb_capability_extension_attr {
USB_DC_EXT_LPM = 0x00000002, USB_DC_EXT_LPM = 0x00000002,
}; };
#define HIRD_50_US 0 #define HIRD_50_US 0
@@ -254,18 +254,18 @@ enum usb_capability_extension_attr {
* \brief Standard USB endpoint transfer types * \brief Standard USB endpoint transfer types
*/ */
enum usb_ep_type { enum usb_ep_type {
USB_EP_TYPE_CONTROL = 0x00, USB_EP_TYPE_CONTROL = 0x00,
USB_EP_TYPE_ISOCHRONOUS = 0x01, USB_EP_TYPE_ISOCHRONOUS = 0x01,
USB_EP_TYPE_BULK = 0x02, USB_EP_TYPE_BULK = 0x02,
USB_EP_TYPE_INTERRUPT = 0x03, USB_EP_TYPE_INTERRUPT = 0x03,
USB_EP_TYPE_MASK = 0x03, USB_EP_TYPE_MASK = 0x03,
}; };
/** /**
* \brief Standard USB language IDs for string descriptors * \brief Standard USB language IDs for string descriptors
*/ */
enum usb_langid { enum usb_langid {
USB_LANGID_EN_US = 0x0409, //!< English (United States) USB_LANGID_EN_US = 0x0409, //!< English (United States)
}; };
/** /**
@@ -308,31 +308,31 @@ COMPILER_PACK_SET(1)
* The data payload of SETUP packets always follows this structure. * The data payload of SETUP packets always follows this structure.
*/ */
typedef struct { typedef struct {
uint8_t bmRequestType; uint8_t bmRequestType;
uint8_t bRequest; uint8_t bRequest;
le16_t wValue; le16_t wValue;
le16_t wIndex; le16_t wIndex;
le16_t wLength; le16_t wLength;
} usb_setup_req_t; } usb_setup_req_t;
/** /**
* \brief Standard USB device descriptor structure * \brief Standard USB device descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
le16_t bcdUSB; le16_t bcdUSB;
uint8_t bDeviceClass; uint8_t bDeviceClass;
uint8_t bDeviceSubClass; uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol; uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0; uint8_t bMaxPacketSize0;
le16_t idVendor; le16_t idVendor;
le16_t idProduct; le16_t idProduct;
le16_t bcdDevice; le16_t bcdDevice;
uint8_t iManufacturer; uint8_t iManufacturer;
uint8_t iProduct; uint8_t iProduct;
uint8_t iSerialNumber; uint8_t iSerialNumber;
uint8_t bNumConfigurations; uint8_t bNumConfigurations;
} usb_dev_desc_t; } usb_dev_desc_t;
/** /**
@@ -344,15 +344,15 @@ typedef struct {
* the device was operating at full speed.) * the device was operating at full speed.)
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
le16_t bcdUSB; le16_t bcdUSB;
uint8_t bDeviceClass; uint8_t bDeviceClass;
uint8_t bDeviceSubClass; uint8_t bDeviceSubClass;
uint8_t bDeviceProtocol; uint8_t bDeviceProtocol;
uint8_t bMaxPacketSize0; uint8_t bMaxPacketSize0;
uint8_t bNumConfigurations; uint8_t bNumConfigurations;
uint8_t bReserved; uint8_t bReserved;
} usb_dev_qual_desc_t; } usb_dev_qual_desc_t;
/** /**
@@ -368,23 +368,22 @@ typedef struct {
* The descriptor type in the GetDescriptor() request is set to BOS. * The descriptor type in the GetDescriptor() request is set to BOS.
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
le16_t wTotalLength; le16_t wTotalLength;
uint8_t bNumDeviceCaps; uint8_t bNumDeviceCaps;
} usb_dev_bos_desc_t; } usb_dev_bos_desc_t;
/** /**
* \brief USB Device Capabilities - USB 2.0 Extension Descriptor structure * \brief USB Device Capabilities - USB 2.0 Extension Descriptor structure
* *
* Defines the set of USB 1.1-specific device level capabilities. * Defines the set of USB 1.1-specific device level capabilities.
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bDevCapabilityType; uint8_t bDevCapabilityType;
le32_t bmAttributes; le32_t bmAttributes;
} usb_dev_capa_ext_desc_t; } usb_dev_capa_ext_desc_t;
/** /**
@@ -393,40 +392,38 @@ typedef struct {
* The BOS descriptor and capabilities descriptors for LPM. * The BOS descriptor and capabilities descriptors for LPM.
*/ */
typedef struct { typedef struct {
usb_dev_bos_desc_t bos; usb_dev_bos_desc_t bos;
usb_dev_capa_ext_desc_t capa_ext; usb_dev_capa_ext_desc_t capa_ext;
} usb_dev_lpm_desc_t; } usb_dev_lpm_desc_t;
/** /**
* \brief Standard USB Interface Association Descriptor structure * \brief Standard USB Interface Association Descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; //!< size of this descriptor in bytes uint8_t bLength; //!< size of this descriptor in bytes
uint8_t bDescriptorType; //!< INTERFACE descriptor type uint8_t bDescriptorType; //!< INTERFACE descriptor type
uint8_t bFirstInterface; //!< Number of interface uint8_t bFirstInterface; //!< Number of interface
uint8_t bInterfaceCount; //!< value to select alternate setting uint8_t bInterfaceCount; //!< value to select alternate setting
uint8_t bFunctionClass; //!< Class code assigned by the USB uint8_t bFunctionClass; //!< Class code assigned by the USB
uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB uint8_t bFunctionSubClass;//!< Sub-class code assigned by the USB
uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB uint8_t bFunctionProtocol;//!< Protocol code assigned by the USB
uint8_t iFunction; //!< Index of string descriptor uint8_t iFunction; //!< Index of string descriptor
} usb_association_desc_t; } usb_association_desc_t;
/** /**
* \brief Standard USB configuration descriptor structure * \brief Standard USB configuration descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
le16_t wTotalLength; le16_t wTotalLength;
uint8_t bNumInterfaces; uint8_t bNumInterfaces;
uint8_t bConfigurationValue; uint8_t bConfigurationValue;
uint8_t iConfiguration; uint8_t iConfiguration;
uint8_t bmAttributes; uint8_t bmAttributes;
uint8_t bMaxPower; uint8_t bMaxPower;
} usb_conf_desc_t; } usb_conf_desc_t;
#define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set #define USB_CONFIG_ATTR_MUST_SET (1 << 7) //!< Must always be set
#define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered #define USB_CONFIG_ATTR_BUS_POWERED (0 << 6) //!< Bus-powered
#define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered #define USB_CONFIG_ATTR_SELF_POWERED (1 << 6) //!< Self-powered
@@ -438,55 +435,54 @@ typedef struct {
* \brief Standard USB association descriptor structure * \brief Standard USB association descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; //!< Size of this descriptor in bytes uint8_t bLength; //!< Size of this descriptor in bytes
uint8_t bDescriptorType; //!< Interface descriptor type uint8_t bDescriptorType; //!< Interface descriptor type
uint8_t bFirstInterface; //!< Number of interface uint8_t bFirstInterface; //!< Number of interface
uint8_t bInterfaceCount; //!< value to select alternate setting uint8_t bInterfaceCount; //!< value to select alternate setting
uint8_t bFunctionClass; //!< Class code assigned by the USB uint8_t bFunctionClass; //!< Class code assigned by the USB
uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB uint8_t bFunctionSubClass; //!< Sub-class code assigned by the USB
uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB uint8_t bFunctionProtocol; //!< Protocol code assigned by the USB
uint8_t iFunction; //!< Index of string descriptor uint8_t iFunction; //!< Index of string descriptor
} usb_iad_desc_t; } usb_iad_desc_t;
/** /**
* \brief Standard USB interface descriptor structure * \brief Standard USB interface descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bInterfaceNumber; uint8_t bInterfaceNumber;
uint8_t bAlternateSetting; uint8_t bAlternateSetting;
uint8_t bNumEndpoints; uint8_t bNumEndpoints;
uint8_t bInterfaceClass; uint8_t bInterfaceClass;
uint8_t bInterfaceSubClass; uint8_t bInterfaceSubClass;
uint8_t bInterfaceProtocol; uint8_t bInterfaceProtocol;
uint8_t iInterface; uint8_t iInterface;
} usb_iface_desc_t; } usb_iface_desc_t;
/** /**
* \brief Standard USB endpoint descriptor structure * \brief Standard USB endpoint descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bEndpointAddress; uint8_t bEndpointAddress;
uint8_t bmAttributes; uint8_t bmAttributes;
le16_t wMaxPacketSize; le16_t wMaxPacketSize;
uint8_t bInterval; uint8_t bInterval;
} usb_ep_desc_t; } usb_ep_desc_t;
/** /**
* \brief A standard USB string descriptor structure * \brief A standard USB string descriptor structure
*/ */
typedef struct { typedef struct {
uint8_t bLength; uint8_t bLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
} usb_str_desc_t; } usb_str_desc_t;
typedef struct { typedef struct {
usb_str_desc_t desc; usb_str_desc_t desc;
le16_t string[1]; le16_t string[1];
} usb_str_lgid_desc_t; } usb_str_lgid_desc_t;
COMPILER_PACK_RESET() COMPILER_PACK_RESET()

135
Marlin/src/HAL/DUE/usb/usb_protocol_cdc.h
View File

@@ -58,42 +58,42 @@
* \name Possible values of class * \name Possible values of class
*/ */
//@{ //@{
#define CDC_CLASS_DEVICE 0x02 //!< USB Communication Device Class #define CDC_CLASS_DEVICE 0x02 //!< USB Communication Device Class
#define CDC_CLASS_COMM 0x02 //!< CDC Communication Class Interface #define CDC_CLASS_COMM 0x02 //!< CDC Communication Class Interface
#define CDC_CLASS_DATA 0x0A //!< CDC Data Class Interface #define CDC_CLASS_DATA 0x0A //!< CDC Data Class Interface
#define CDC_CLASS_MULTI 0xEF //!< CDC Multi-interface Function #define CDC_CLASS_MULTI 0xEF //!< CDC Multi-interface Function
//@} //@}
//! \name USB CDC Subclass IDs //! \name USB CDC Subclass IDs
//@{ //@{
#define CDC_SUBCLASS_DLCM 0x01 //!< Direct Line Control Model #define CDC_SUBCLASS_DLCM 0x01 //!< Direct Line Control Model
#define CDC_SUBCLASS_ACM 0x02 //!< Abstract Control Model #define CDC_SUBCLASS_ACM 0x02 //!< Abstract Control Model
#define CDC_SUBCLASS_TCM 0x03 //!< Telephone Control Model #define CDC_SUBCLASS_TCM 0x03 //!< Telephone Control Model
#define CDC_SUBCLASS_MCCM 0x04 //!< Multi-Channel Control Model #define CDC_SUBCLASS_MCCM 0x04 //!< Multi-Channel Control Model
#define CDC_SUBCLASS_CCM 0x05 //!< CAPI Control Model #define CDC_SUBCLASS_CCM 0x05 //!< CAPI Control Model
#define CDC_SUBCLASS_ETH 0x06 //!< Ethernet Networking Control Model #define CDC_SUBCLASS_ETH 0x06 //!< Ethernet Networking Control Model
#define CDC_SUBCLASS_ATM 0x07 //!< ATM Networking Control Model #define CDC_SUBCLASS_ATM 0x07 //!< ATM Networking Control Model
//@} //@}
//! \name USB CDC Communication Interface Protocol IDs //! \name USB CDC Communication Interface Protocol IDs
//@{ //@{
#define CDC_PROTOCOL_V25TER 0x01 //!< Common AT commands #define CDC_PROTOCOL_V25TER 0x01 //!< Common AT commands
//@} //@}
//! \name USB CDC Data Interface Protocol IDs //! \name USB CDC Data Interface Protocol IDs
//@{ //@{
#define CDC_PROTOCOL_I430 0x30 //!< ISDN BRI #define CDC_PROTOCOL_I430 0x30 //!< ISDN BRI
#define CDC_PROTOCOL_HDLC 0x31 //!< HDLC #define CDC_PROTOCOL_HDLC 0x31 //!< HDLC
#define CDC_PROTOCOL_TRANS 0x32 //!< Transparent #define CDC_PROTOCOL_TRANS 0x32 //!< Transparent
#define CDC_PROTOCOL_Q921M 0x50 //!< Q.921 management protocol #define CDC_PROTOCOL_Q921M 0x50 //!< Q.921 management protocol
#define CDC_PROTOCOL_Q921 0x51 //!< Q.931 [sic] Data link protocol #define CDC_PROTOCOL_Q921 0x51 //!< Q.931 [sic] Data link protocol
#define CDC_PROTOCOL_Q921TM 0x52 //!< Q.921 TEI-multiplexor #define CDC_PROTOCOL_Q921TM 0x52 //!< Q.921 TEI-multiplexor
#define CDC_PROTOCOL_V42BIS 0x90 //!< Data compression procedures #define CDC_PROTOCOL_V42BIS 0x90 //!< Data compression procedures
#define CDC_PROTOCOL_Q931 0x91 //!< Euro-ISDN protocol control #define CDC_PROTOCOL_Q931 0x91 //!< Euro-ISDN protocol control
#define CDC_PROTOCOL_V120 0x92 //!< V.24 rate adaption to ISDN #define CDC_PROTOCOL_V120 0x92 //!< V.24 rate adaption to ISDN
#define CDC_PROTOCOL_CAPI20 0x93 //!< CAPI Commands #define CDC_PROTOCOL_CAPI20 0x93 //!< CAPI Commands
#define CDC_PROTOCOL_HOST 0xFD //!< Host based driver #define CDC_PROTOCOL_HOST 0xFD //!< Host based driver
/** /**
* \brief Describes the Protocol Unit Functional Descriptors [sic] * \brief Describes the Protocol Unit Functional Descriptors [sic]
* on Communication Class Interface * on Communication Class Interface
@@ -103,16 +103,16 @@
//! \name USB CDC Functional Descriptor Types //! \name USB CDC Functional Descriptor Types
//@{ //@{
#define CDC_CS_INTERFACE 0x24 //!< Interface Functional Descriptor #define CDC_CS_INTERFACE 0x24 //!< Interface Functional Descriptor
#define CDC_CS_ENDPOINT 0x25 //!< Endpoint Functional Descriptor #define CDC_CS_ENDPOINT 0x25 //!< Endpoint Functional Descriptor
//@} //@}
//! \name USB CDC Functional Descriptor Subtypes //! \name USB CDC Functional Descriptor Subtypes
//@{ //@{
#define CDC_SCS_HEADER 0x00 //!< Header Functional Descriptor #define CDC_SCS_HEADER 0x00 //!< Header Functional Descriptor
#define CDC_SCS_CALL_MGMT 0x01 //!< Call Management #define CDC_SCS_CALL_MGMT 0x01 //!< Call Management
#define CDC_SCS_ACM 0x02 //!< Abstract Control Management #define CDC_SCS_ACM 0x02 //!< Abstract Control Management
#define CDC_SCS_UNION 0x06 //!< Union Functional Descriptor #define CDC_SCS_UNION 0x06 //!< Union Functional Descriptor
//@} //@}
//! \name USB CDC Request IDs //! \name USB CDC Request IDs
@@ -168,42 +168,40 @@ COMPILER_PACK_SET(1)
//! \name USB CDC Descriptors //! \name USB CDC Descriptors
//@{ //@{
//! CDC Header Functional Descriptor //! CDC Header Functional Descriptor
typedef struct { typedef struct {
uint8_t bFunctionLength; uint8_t bFunctionLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bDescriptorSubtype; uint8_t bDescriptorSubtype;
le16_t bcdCDC; le16_t bcdCDC;
} usb_cdc_hdr_desc_t; } usb_cdc_hdr_desc_t;
//! CDC Call Management Functional Descriptor //! CDC Call Management Functional Descriptor
typedef struct { typedef struct {
uint8_t bFunctionLength; uint8_t bFunctionLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bDescriptorSubtype; uint8_t bDescriptorSubtype;
uint8_t bmCapabilities; uint8_t bmCapabilities;
uint8_t bDataInterface; uint8_t bDataInterface;
} usb_cdc_call_mgmt_desc_t; } usb_cdc_call_mgmt_desc_t;
//! CDC ACM Functional Descriptor //! CDC ACM Functional Descriptor
typedef struct { typedef struct {
uint8_t bFunctionLength; uint8_t bFunctionLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bDescriptorSubtype; uint8_t bDescriptorSubtype;
uint8_t bmCapabilities; uint8_t bmCapabilities;
} usb_cdc_acm_desc_t; } usb_cdc_acm_desc_t;
//! CDC Union Functional Descriptor //! CDC Union Functional Descriptor
typedef struct { typedef struct {
uint8_t bFunctionLength; uint8_t bFunctionLength;
uint8_t bDescriptorType; uint8_t bDescriptorType;
uint8_t bDescriptorSubtype; uint8_t bDescriptorSubtype;
uint8_t bMasterInterface; uint8_t bMasterInterface;
uint8_t bSlaveInterface0; uint8_t bSlaveInterface0;
} usb_cdc_union_desc_t; } usb_cdc_union_desc_t;
//! \name USB CDC Call Management Capabilities //! \name USB CDC Call Management Capabilities
//@{ //@{
//! Device handles call management itself //! Device handles call management itself
@@ -235,24 +233,24 @@ typedef struct {
//@{ //@{
//! Line Coding structure //! Line Coding structure
typedef struct { typedef struct {
le32_t dwDTERate; le32_t dwDTERate;
uint8_t bCharFormat; uint8_t bCharFormat;
uint8_t bParityType; uint8_t bParityType;
uint8_t bDataBits; uint8_t bDataBits;
} usb_cdc_line_coding_t; } usb_cdc_line_coding_t;
//! Possible values of bCharFormat //! Possible values of bCharFormat
enum cdc_char_format { enum cdc_char_format {
CDC_STOP_BITS_1 = 0, //!< 1 stop bit CDC_STOP_BITS_1 = 0, //!< 1 stop bit
CDC_STOP_BITS_1_5 = 1, //!< 1.5 stop bits CDC_STOP_BITS_1_5 = 1, //!< 1.5 stop bits
CDC_STOP_BITS_2 = 2, //!< 2 stop bits CDC_STOP_BITS_2 = 2, //!< 2 stop bits
}; };
//! Possible values of bParityType //! Possible values of bParityType
enum cdc_parity { enum cdc_parity {
CDC_PAR_NONE = 0, //!< No parity CDC_PAR_NONE = 0, //!< No parity
CDC_PAR_ODD = 1, //!< Odd parity CDC_PAR_ODD = 1, //!< Odd parity
CDC_PAR_EVEN = 2, //!< Even parity CDC_PAR_EVEN = 2, //!< Even parity
CDC_PAR_MARK = 3, //!< Parity forced to 0 (space) CDC_PAR_MARK = 3, //!< Parity forced to 0 (space)
CDC_PAR_SPACE = 4, //!< Parity forced to 1 (mark) CDC_PAR_SPACE = 4, //!< Parity forced to 1 (mark)
}; };
//@} //@}
@@ -262,7 +260,7 @@ enum cdc_parity {
//! Control signal structure //! Control signal structure
typedef struct { typedef struct {
uint16_t value; uint16_t value;
} usb_cdc_control_signal_t; } usb_cdc_control_signal_t;
//! \name Possible values in usb_cdc_control_signal_t //! \name Possible values in usb_cdc_control_signal_t
@@ -278,16 +276,15 @@ typedef struct {
//@} //@}
//@} //@}
//! \name USB CDC notification message //! \name USB CDC notification message
//@{ //@{
typedef struct { typedef struct {
uint8_t bmRequestType; uint8_t bmRequestType;
uint8_t bNotification; uint8_t bNotification;
le16_t wValue; le16_t wValue;
le16_t wIndex; le16_t wIndex;
le16_t wLength; le16_t wLength;
} usb_cdc_notify_msg_t; } usb_cdc_notify_msg_t;
//! \name USB CDC serial state //! \name USB CDC serial state
@@ -295,8 +292,8 @@ typedef struct {
//! Hardware handshake support (cdc spec 1.1 chapter 6.3.5) //! Hardware handshake support (cdc spec 1.1 chapter 6.3.5)
typedef struct { typedef struct {
usb_cdc_notify_msg_t header; usb_cdc_notify_msg_t header;
le16_t value; le16_t value;
} usb_cdc_notify_serial_state_t; } usb_cdc_notify_serial_state_t;
//! \name Possible values in usb_cdc_notify_serial_state_t //! \name Possible values in usb_cdc_notify_serial_state_t

68
Marlin/src/HAL/DUE/usb/usb_protocol_msc.h
View File

@@ -47,7 +47,6 @@
#ifndef _USB_PROTOCOL_MSC_H_ #ifndef _USB_PROTOCOL_MSC_H_
#define _USB_PROTOCOL_MSC_H_ #define _USB_PROTOCOL_MSC_H_
/** /**
* \ingroup usb_protocol_group * \ingroup usb_protocol_group
* \defgroup usb_msc_protocol USB Mass Storage Class (MSC) protocol definitions * \defgroup usb_msc_protocol USB Mass Storage Class (MSC) protocol definitions
@@ -59,7 +58,7 @@
* \name Possible Class value * \name Possible Class value
*/ */
//@{ //@{
#define MSC_CLASS 0x08 #define MSC_CLASS 0x08
//@} //@}
/** /**
@@ -71,12 +70,12 @@
* operating systems like Windows XP. * operating systems like Windows XP.
*/ */
//@{ //@{
#define MSC_SUBCLASS_RBC 0x01 //!< Reduced Block Commands #define MSC_SUBCLASS_RBC 0x01 //!< Reduced Block Commands
#define MSC_SUBCLASS_ATAPI 0x02 //!< CD/DVD devices #define MSC_SUBCLASS_ATAPI 0x02 //!< CD/DVD devices
#define MSC_SUBCLASS_QIC_157 0x03 //!< Tape devices #define MSC_SUBCLASS_QIC_157 0x03 //!< Tape devices
#define MSC_SUBCLASS_UFI 0x04 //!< Floppy disk drives #define MSC_SUBCLASS_UFI 0x04 //!< Floppy disk drives
#define MSC_SUBCLASS_SFF_8070I 0x05 //!< Floppy disk drives #define MSC_SUBCLASS_SFF_8070I 0x05 //!< Floppy disk drives
#define MSC_SUBCLASS_TRANSPARENT 0x06 //!< Determined by INQUIRY #define MSC_SUBCLASS_TRANSPARENT 0x06 //!< Determined by INQUIRY
//@} //@}
/** /**
@@ -84,21 +83,19 @@
* \note Only the BULK protocol should be used in new designs. * \note Only the BULK protocol should be used in new designs.
*/ */
//@{ //@{
#define MSC_PROTOCOL_CBI 0x00 //!< Command/Bulk/Interrupt #define MSC_PROTOCOL_CBI 0x00 //!< Command/Bulk/Interrupt
#define MSC_PROTOCOL_CBI_ALT 0x01 //!< W/o command completion #define MSC_PROTOCOL_CBI_ALT 0x01 //!< W/o command completion
#define MSC_PROTOCOL_BULK 0x50 //!< Bulk-only #define MSC_PROTOCOL_BULK 0x50 //!< Bulk-only
//@} //@}
/** /**
* \brief MSC USB requests (bRequest) * \brief MSC USB requests (bRequest)
*/ */
enum usb_reqid_msc { enum usb_reqid_msc {
USB_REQ_MSC_BULK_RESET = 0xFF, //!< Mass Storage Reset USB_REQ_MSC_BULK_RESET = 0xFF, //!< Mass Storage Reset
USB_REQ_MSC_GET_MAX_LUN = 0xFE //!< Get Max LUN USB_REQ_MSC_GET_MAX_LUN = 0xFE //!< Get Max LUN
}; };
COMPILER_PACK_SET(1) COMPILER_PACK_SET(1)
/** /**
@@ -106,38 +103,37 @@ COMPILER_PACK_SET(1)
*/ */
//@{ //@{
struct usb_msc_cbw { struct usb_msc_cbw {
le32_t dCBWSignature; //!< Must contain 'USBC' le32_t dCBWSignature; //!< Must contain 'USBC'
le32_t dCBWTag; //!< Unique command ID le32_t dCBWTag; //!< Unique command ID
le32_t dCBWDataTransferLength; //!< Number of bytes to transfer le32_t dCBWDataTransferLength; //!< Number of bytes to transfer
uint8_t bmCBWFlags; //!< Direction in bit 7 uint8_t bmCBWFlags; //!< Direction in bit 7
uint8_t bCBWLUN; //!< Logical Unit Number uint8_t bCBWLUN; //!< Logical Unit Number
uint8_t bCBWCBLength; //!< Number of valid CDB bytes uint8_t bCBWCBLength; //!< Number of valid CDB bytes
uint8_t CDB[16]; //!< SCSI Command Descriptor Block uint8_t CDB[16]; //!< SCSI Command Descriptor Block
}; };
#define USB_CBW_SIGNATURE 0x55534243 //!< dCBWSignature value #define USB_CBW_SIGNATURE 0x55534243 //!< dCBWSignature value
#define USB_CBW_DIRECTION_IN (1<<7) //!< Data from device to host #define USB_CBW_DIRECTION_IN (1<<7) //!< Data from device to host
#define USB_CBW_DIRECTION_OUT (0<<7) //!< Data from host to device #define USB_CBW_DIRECTION_OUT (0<<7) //!< Data from host to device
#define USB_CBW_LUN_MASK 0x0F //!< Valid bits in bCBWLUN #define USB_CBW_LUN_MASK 0x0F //!< Valid bits in bCBWLUN
#define USB_CBW_LEN_MASK 0x1F //!< Valid bits in bCBWCBLength #define USB_CBW_LEN_MASK 0x1F //!< Valid bits in bCBWCBLength
//@} //@}
/** /**
* \name A Command Status Wrapper (CSW). * \name A Command Status Wrapper (CSW).
*/ */
//@{ //@{
struct usb_msc_csw { struct usb_msc_csw {
le32_t dCSWSignature; //!< Must contain 'USBS' le32_t dCSWSignature; //!< Must contain 'USBS'
le32_t dCSWTag; //!< Same as dCBWTag le32_t dCSWTag; //!< Same as dCBWTag
le32_t dCSWDataResidue; //!< Number of bytes not transferred le32_t dCSWDataResidue; //!< Number of bytes not transferred
uint8_t bCSWStatus; //!< Status code uint8_t bCSWStatus; //!< Status code
}; };
#define USB_CSW_SIGNATURE 0x55534253 //!< dCSWSignature value #define USB_CSW_SIGNATURE 0x55534253 //!< dCSWSignature value
#define USB_CSW_STATUS_PASS 0x00 //!< Command Passed #define USB_CSW_STATUS_PASS 0x00 //!< Command Passed
#define USB_CSW_STATUS_FAIL 0x01 //!< Command Failed #define USB_CSW_STATUS_FAIL 0x01 //!< Command Failed
#define USB_CSW_STATUS_PE 0x02 //!< Phase Error #define USB_CSW_STATUS_PE 0x02 //!< Phase Error
//@} //@}
COMPILER_PACK_RESET() COMPILER_PACK_RESET()

4
Marlin/src/HAL/ESP32/HAL.h
View File

@@ -1,7 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/ESP32/HAL_SPI.cpp
View File

@@ -4,7 +4,6 @@
* *
* Based on Sprinter and grbl. * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* Copyright (c) 2017 Victor Perez
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

4
Marlin/src/HAL/ESP32/ota.cpp
View File

@@ -1,7 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

4
Marlin/src/HAL/ESP32/ota.h
View File

@@ -1,7 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

3
Marlin/src/HAL/ESP32/u8g_esp32_spi.cpp
View File

@@ -41,7 +41,6 @@
static SPISettings spiConfig; static SPISettings spiConfig;
#ifndef LCD_SPI_SPEED #ifndef LCD_SPI_SPEED
#ifdef SD_SPI_SPEED #ifdef SD_SPI_SPEED
#define LCD_SPI_SPEED SD_SPI_SPEED // Assume SPI speed shared with SD #define LCD_SPI_SPEED SD_SPI_SPEED // Assume SPI speed shared with SD
@@ -101,6 +100,6 @@ uint8_t u8g_eps_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_pt
return 1; return 1;
} }
#endif // ANY(MKS_MINI_12864, FYSETC_MINI_12864_2_1) #endif // MKS_MINI_12864 || FYSETC_MINI_12864_2_1
#endif // ARDUINO_ARCH_ESP32 #endif // ARDUINO_ARCH_ESP32

1
Marlin/src/HAL/LINUX/HAL.cpp
View File

@@ -19,6 +19,7 @@
* along with this program. If not, see <https://www.gnu.org/licenses/>. * along with this program. If not, see <https://www.gnu.org/licenses/>.
* *
*/ */
#ifdef __PLAT_LINUX__ #ifdef __PLAT_LINUX__
#include "../../inc/MarlinConfig.h" #include "../../inc/MarlinConfig.h"

6
Marlin/src/HAL/LINUX/HAL.h
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/LINUX/servo_private.h
View File

@@ -60,7 +60,6 @@
#define INVALID_SERVO 255 // flag indicating an invalid servo index #define INVALID_SERVO 255 // flag indicating an invalid servo index
// Types // Types
typedef struct { typedef struct {

6
Marlin/src/HAL/LINUX/timers.cpp
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

5
Marlin/src/HAL/LINUX/timers.h
View File

@@ -1,8 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

6
Marlin/src/HAL/LPC1768/HAL.h
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

2
Marlin/src/HAL/LPC1768/HAL_SPI.cpp
View File

@@ -318,7 +318,7 @@ void SPIClass::dmaSend(void *buf, uint16_t length, bool minc) {
// Enable DMA // Enable DMA
GPDMA_ChannelCmd(0, ENABLE); GPDMA_ChannelCmd(0, ENABLE);
/* /**
* Observed behaviour on normal data transfer completion (SKR 1.3 board / LPC1768 MCU) * Observed behaviour on normal data transfer completion (SKR 1.3 board / LPC1768 MCU)
* GPDMA_STAT_INTTC flag is SET * GPDMA_STAT_INTTC flag is SET
* GPDMA_STAT_INTERR flag is NOT SET * GPDMA_STAT_INTERR flag is NOT SET

22
Marlin/src/HAL/LPC1768/MinSerial.cpp
View File

@@ -33,18 +33,18 @@ static void TX(char c) { _DBC(c); }
void install_min_serial() { HAL_min_serial_out = &TX; } void install_min_serial() { HAL_min_serial_out = &TX; }
#if DISABLED(DYNAMIC_VECTORTABLE) #if DISABLED(DYNAMIC_VECTORTABLE)
extern "C" { extern "C" {
__attribute__((naked)) void JumpHandler_ASM() { __attribute__((naked)) void JumpHandler_ASM() {
__asm__ __volatile__ ( __asm__ __volatile__ (
"b CommonHandler_ASM\n" "b CommonHandler_ASM\n"
); );
}
void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) UsageFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) MemManage_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) NMI_Handler();
} }
void __attribute__((naked, alias("JumpHandler_ASM"))) HardFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) BusFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) UsageFault_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) MemManage_Handler();
void __attribute__((naked, alias("JumpHandler_ASM"))) NMI_Handler();
}
#endif #endif
#endif // POSTMORTEM_DEBUGGING #endif // POSTMORTEM_DEBUGGING

6
Marlin/src/HAL/LPC1768/timers.cpp
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

5
Marlin/src/HAL/LPC1768/timers.h
View File

@@ -1,8 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/LPC1768/u8g/LCD_defines.h
View File

@@ -34,7 +34,6 @@ uint8_t u8g_com_HAL_LPC1768_ST7920_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t ar
uint8_t u8g_com_HAL_LPC1768_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); uint8_t u8g_com_HAL_LPC1768_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr);
uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr); uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_ptr);
// connect U8g com generic com names to the desired driver // connect U8g com generic com names to the desired driver
#define U8G_COM_HW_SPI u8g_com_HAL_LPC1768_hw_spi_fn // use LPC1768 specific hardware SPI routine #define U8G_COM_HW_SPI u8g_com_HAL_LPC1768_hw_spi_fn // use LPC1768 specific hardware SPI routine
#define U8G_COM_SW_SPI u8g_com_HAL_LPC1768_sw_spi_fn // use LPC1768 specific software SPI routine #define U8G_COM_SW_SPI u8g_com_HAL_LPC1768_sw_spi_fn // use LPC1768 specific software SPI routine

1
Marlin/src/HAL/LPC1768/u8g/u8g_com_HAL_LPC1768_hw_spi.cpp
View File

@@ -125,5 +125,4 @@ uint8_t u8g_com_HAL_LPC1768_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val,
} }
#endif // HAS_MARLINUI_U8GLIB #endif // HAS_MARLINUI_U8GLIB
#endif // TARGET_LPC1768 #endif // TARGET_LPC1768

1
Marlin/src/HAL/LPC1768/u8g/u8g_com_HAL_LPC1768_ssd_hw_i2c.cpp
View File

@@ -194,5 +194,4 @@ uint8_t u8g_com_HAL_LPC1768_ssd_hw_i2c_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_v
} }
#endif // HAS_MARLINUI_U8GLIB #endif // HAS_MARLINUI_U8GLIB
#endif // TARGET_LPC1768 #endif // TARGET_LPC1768

1
Marlin/src/HAL/LPC1768/u8g/u8g_com_HAL_LPC1768_st7920_hw_spi.cpp
View File

@@ -134,5 +134,4 @@ uint8_t u8g_com_HAL_LPC1768_ST7920_hw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t ar
} }
#endif // HAS_MARLINUI_U8GLIB #endif // HAS_MARLINUI_U8GLIB
#endif // TARGET_LPC1768 #endif // TARGET_LPC1768

8
Marlin/src/HAL/LPC1768/u8g/u8g_com_HAL_LPC1768_sw_spi.cpp
View File

@@ -160,10 +160,10 @@ uint8_t u8g_com_HAL_LPC1768_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val,
break; break;
case U8G_COM_MSG_CHIP_SELECT: case U8G_COM_MSG_CHIP_SELECT:
#if ANY(FYSETC_MINI_12864, MKS_MINI_12864) // LCD SPI is running mode 3 while SD card is running mode 0 #if ANY(FYSETC_MINI_12864, MKS_MINI_12864) // LCD SPI is running mode 3 while SD card is running mode 0
if (arg_val) { // SCK idle state needs to be set to the proper idle state before if (arg_val) { // SCK idle state needs to be set to the proper idle state before
// the next chip select goes active // the next chip select goes active
u8g_SetPILevel(u8g, U8G_PI_SCK, 1); // Set SCK to mode 3 idle state before CS goes active u8g_SetPILevel(u8g, U8G_PI_SCK, 1); // Set SCK to mode 3 idle state before CS goes active
u8g_SetPILevel(u8g, U8G_PI_CS, LOW); u8g_SetPILevel(u8g, U8G_PI_CS, LOW);
} }
else { else {

5
Marlin/src/HAL/LPC1768/win_usb_driver/lpc176x_usb_driver.inf
View File

@@ -8,14 +8,12 @@ DriverVer =04/14/2008, 5.1.2600.5512
[Manufacturer] [Manufacturer]
%PROVIDER%=DeviceList,ntamd64 %PROVIDER%=DeviceList,ntamd64
[DeviceList] [DeviceList]
%DESCRIPTION%=LPC1768USB, USB\VID_1D50&PID_6029&MI_00 %DESCRIPTION%=LPC1768USB, USB\VID_1D50&PID_6029&MI_00
[DeviceList.ntamd64] [DeviceList.ntamd64]
%DESCRIPTION%=LPC1768USB, USB\VID_1D50&PID_6029&MI_00 %DESCRIPTION%=LPC1768USB, USB\VID_1D50&PID_6029&MI_00
[LPC1768USB] [LPC1768USB]
include=mdmcpq.inf include=mdmcpq.inf
CopyFiles=FakeModemCopyFileSection CopyFiles=FakeModemCopyFileSection
@@ -28,9 +26,8 @@ AddService=usbser, 0x00000002, LowerFilter_Service_Inst
[SerialPropPageAddReg] [SerialPropPageAddReg]
HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider" HKR,,EnumPropPages32,,"MsPorts.dll,SerialPortPropPageProvider"
[Strings] [Strings]
PROVIDER = "marlinfw.org" PROVIDER = "marlinfw.org"
DRIVER.SVC = "Marlin USB Driver" DRIVER.SVC = "Marlin USB Driver"
DESCRIPTION= "Marlin USB Serial" DESCRIPTION= "Marlin USB Serial"
COMPOSITE = "Marlin USB VCOM" COMPOSITE = "Marlin USB VCOM"

6
Marlin/src/HAL/NATIVE_SIM/HAL.h
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

6
Marlin/src/HAL/NATIVE_SIM/MarlinSPI.h
View File

@@ -1,9 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

3
Marlin/src/HAL/NATIVE_SIM/pinsDebug.h
View File

@@ -2,6 +2,9 @@
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or

1
Marlin/src/HAL/NATIVE_SIM/servo_private.h
View File

@@ -61,7 +61,6 @@
#define INVALID_SERVO 255 // flag indicating an invalid servo index #define INVALID_SERVO 255 // flag indicating an invalid servo index
// Types // Types
typedef struct { typedef struct {

6
Marlin/src/HAL/NATIVE_SIM/tft/tft_spi.h
View File

@@ -31,10 +31,10 @@
#endif #endif
#define DATASIZE_8BIT 8 #define DATASIZE_8BIT 8
#define DATASIZE_16BIT 16 #define DATASIZE_16BIT 16
#define TFT_IO_DRIVER TFT_SPI #define TFT_IO_DRIVER TFT_SPI
#define DMA_MINC_ENABLE 1 #define DMA_MINC_ENABLE 1
#define DMA_MINC_DISABLE 0 #define DMA_MINC_DISABLE 0
class TFT_SPI { class TFT_SPI {

3
Marlin/src/HAL/NATIVE_SIM/tft/xpt2046.h
View File

@@ -2,6 +2,9 @@
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
*
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or * the Free Software Foundation, either version 3 of the License, or

5
Marlin/src/HAL/NATIVE_SIM/timers.h
View File

@@ -1,8 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2021 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

4
Marlin/src/HAL/NATIVE_SIM/u8g/LCD_defines.h
View File

@@ -21,6 +21,10 @@
*/ */
#pragma once #pragma once
/**
* Native/Simulator LCD-specific defines
*/
void usleep(uint64_t microsec); void usleep(uint64_t microsec);
// The following are optional depending on the platform. // The following are optional depending on the platform.

1
Marlin/src/HAL/NATIVE_SIM/u8g/LCD_pin_routines.h
View File

@@ -31,7 +31,6 @@
* resulted in using about about 25% of the CPU's time. * resulted in using about about 25% of the CPU's time.
*/ */
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif

4
Marlin/src/HAL/NATIVE_SIM/u8g/u8g_com_st7920_sw_spi.cpp
View File

@@ -100,6 +100,7 @@ static void u8g_com_st7920_write_byte_sw_spi(uint8_t rs, uint8_t val) {
swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); swSpiTransfer(val & 0x0F0, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
swSpiTransfer(val << 4, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL); swSpiTransfer(val << 4, SPI_speed, SCK_pin_ST7920_HAL, -1, MOSI_pin_ST7920_HAL_HAL);
} }
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
@@ -128,7 +129,7 @@ uint8_t u8g_com_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void
break; break;
case U8G_COM_MSG_RESET: case U8G_COM_MSG_RESET:
if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_RESET]) u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val); if (U8G_PIN_NONE != u8g->pin_list[U8G_PI_RESET]) u8g_SetPILevel(u8g, U8G_PI_RESET, arg_val);
break; break;
case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */ case U8G_COM_MSG_ADDRESS: /* define cmd (arg_val = 0) or data mode (arg_val = 1) */
@@ -163,6 +164,7 @@ uint8_t u8g_com_ST7920_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void
} }
return 1; return 1;
} }
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif

8
Marlin/src/HAL/NATIVE_SIM/u8g/u8g_com_sw_spi.cpp
View File

@@ -159,10 +159,10 @@ uint8_t u8g_com_sw_spi_fn(u8g_t *u8g, uint8_t msg, uint8_t arg_val, void *arg_pt
break; break;
case U8G_COM_MSG_CHIP_SELECT: case U8G_COM_MSG_CHIP_SELECT:
#if ANY(FYSETC_MINI_12864, MKS_MINI_12864) // LCD SPI is running mode 3 while SD card is running mode 0 #if ANY(FYSETC_MINI_12864, MKS_MINI_12864) // LCD SPI is running mode 3 while SD card is running mode 0
if (arg_val) { // SCK idle state needs to be set to the proper idle state before if (arg_val) { // SCK idle state needs to be set to the proper idle state before
// the next chip select goes active // the next chip select goes active
u8g_SetPILevel(u8g, U8G_PI_SCK, 1); // Set SCK to mode 3 idle state before CS goes active u8g_SetPILevel(u8g, U8G_PI_SCK, 1); // Set SCK to mode 3 idle state before CS goes active
u8g_SetPILevel(u8g, U8G_PI_CS, LOW); u8g_SetPILevel(u8g, U8G_PI_CS, LOW);
} }
else { else {

3
Marlin/src/HAL/SAMD21/HAL.cpp
View File

@@ -40,8 +40,6 @@
DefaultSerial3 MSerial2(false, Serial2); DefaultSerial3 MSerial2(false, Serial2);
#endif #endif
#define WDT_CONFIG_PER_7_Val 0x9u #define WDT_CONFIG_PER_7_Val 0x9u
#define WDT_CONFIG_PER_Pos 0 #define WDT_CONFIG_PER_Pos 0
#define WDT_CONFIG_PER_7 (WDT_CONFIG_PER_7_Val << WDT_CONFIG_PER_Pos) #define WDT_CONFIG_PER_7 (WDT_CONFIG_PER_7_Val << WDT_CONFIG_PER_Pos)
@@ -165,7 +163,6 @@ void MarlinHAL::adc_init() {
ADC->REFCTRL.reg = ADC_REFCTRL_REFSEL_INTVCC1; ADC->REFCTRL.reg = ADC_REFCTRL_REFSEL_INTVCC1;
ADC->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_32| ADC_AVGCTRL_ADJRES(4);; ADC->AVGCTRL.reg = ADC_AVGCTRL_SAMPLENUM_32| ADC_AVGCTRL_ADJRES(4);;
ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV128 | ADC->CTRLB.reg = ADC_CTRLB_PRESCALER_DIV128 |
ADC_CTRLB_RESSEL_16BIT | ADC_CTRLB_RESSEL_16BIT |
ADC_CTRLB_FREERUN; ADC_CTRLB_FREERUN;

1
Marlin/src/HAL/SAMD21/HAL.h
View File

@@ -47,7 +47,6 @@ typedef ForwardSerial1Class< decltype(Serial2) > DefaultSerial3;
extern DefaultSerial2 MSerial0; extern DefaultSerial2 MSerial0;
extern DefaultSerial3 MSerial1; extern DefaultSerial3 MSerial1;
#define __MSERIAL(X) MSerial##X #define __MSERIAL(X) MSerial##X
#define _MSERIAL(X) __MSERIAL(X) #define _MSERIAL(X) __MSERIAL(X)
#define MSERIAL(X) _MSERIAL(INCREMENT(X)) #define MSERIAL(X) _MSERIAL(INCREMENT(X))

2
Marlin/src/HAL/SAMD21/SAMD21.h
View File

@@ -57,8 +57,6 @@
: (P == 3 && WITHIN(B, 20, 21)) ? 10 + (B) - 20 \ : (P == 3 && WITHIN(B, 20, 21)) ? 10 + (B) - 20 \
: -1) : -1)
#define A2_AIN 3 #define A2_AIN 3
#define A3_AIN 4 #define A3_AIN 4
#define A4_AIN 5 #define A4_AIN 5

1
Marlin/src/HAL/SAMD21/Servo.cpp
View File

@@ -55,7 +55,6 @@
#define TIMER_TCCHANNEL(t) ((t) & 1) #define TIMER_TCCHANNEL(t) ((t) & 1)
#define TC_COUNTER_START_VAL 0xFFFF #define TC_COUNTER_START_VAL 0xFFFF
static volatile int8_t currentServoIndex[_Nbr_16timers]; // index for the servo being pulsed for each timer (or -1 if refresh interval) static volatile int8_t currentServoIndex[_Nbr_16timers]; // index for the servo being pulsed for each timer (or -1 if refresh interval)
FORCE_INLINE static uint16_t getTimerCount() { FORCE_INLINE static uint16_t getTimerCount() {

7
Marlin/src/HAL/SAMD21/eeprom_flash.cpp
View File

@@ -99,8 +99,7 @@ bool PersistentStore::access_finish() {
volatile uint32_t *dst_addr = (volatile uint32_t *) &flashdata; volatile uint32_t *dst_addr = (volatile uint32_t *) &flashdata;
uint32_t *pointer = (uint32_t *) buffer; uint32_t *pointer = (uint32_t *) buffer;
for (uint32_t i = 0; i < TOTAL_FLASH_SIZE; i+=4) { for (uint32_t i = 0; i < TOTAL_FLASH_SIZE; i += 4) {
*dst_addr = (uint32_t) *pointer; *dst_addr = (uint32_t) *pointer;
pointer++; pointer++;
dst_addr ++; dst_addr ++;
@@ -120,7 +119,7 @@ bool PersistentStore::write_data(int &pos, const uint8_t *value, size_t size, ui
if (!hasWritten) { if (!hasWritten) {
// init temp buffer // init temp buffer
buffer = (uint8_t *) malloc(MARLIN_EEPROM_SIZE); buffer = (uint8_t *) malloc(MARLIN_EEPROM_SIZE);
hasWritten=true; hasWritten = true;
} }
memcpy(buffer+pos,value,size); memcpy(buffer+pos,value,size);
@@ -132,7 +131,7 @@ bool PersistentStore::read_data(int &pos, uint8_t *value, size_t size, uint16_t
volatile uint8_t *dst_addr = (volatile uint8_t *) &flashdata; volatile uint8_t *dst_addr = (volatile uint8_t *) &flashdata;
dst_addr += pos; dst_addr += pos;
memcpy(value,(const void *) dst_addr,size); memcpy(value, (const void *)dst_addr, size);
pos += size; pos += size;
return false; return false;
} }

2
Marlin/src/HAL/SAMD21/fastio.h
View File

@@ -129,7 +129,7 @@
* Added as necessary or if I feel like it- not a comprehensive list! * Added as necessary or if I feel like it- not a comprehensive list!
*/ */
/* /**
* Some of these share the same source and so can't be used in the same time * Some of these share the same source and so can't be used in the same time
*/ */
#define PWM_PIN(P) (WITHIN(P, 2, 13) || WITHIN(P, 22, 23) || WITHIN(P, 44, 45) || P == 48) #define PWM_PIN(P) (WITHIN(P, 2, 13) || WITHIN(P, 22, 23) || WITHIN(P, 44, 45) || P == 48)

1
Marlin/src/HAL/SAMD21/inc/Conditionals_LCD.h
View File

@@ -19,5 +19,4 @@
* along with this program. If not, see <https://www.gnu.org/licenses/>. * along with this program. If not, see <https://www.gnu.org/licenses/>.
* *
*/ */
#pragma once #pragma once

2
Marlin/src/HAL/SAMD21/timers.cpp
View File

@@ -135,7 +135,7 @@ void HAL_timer_start(const uint8_t timer_num, const uint32_t frequency) {
} }
else if (timer_config[timer_num].type==TimerType::tcc) { else if (timer_config[timer_num].type==TimerType::tcc) {
Tcc * const tc = timer_config[timer_num].pTcc; Tcc * const tc = timer_config[timer_num].pTcc;
PM->APBCMASK.reg |= PM_APBCMASK_TCC0; PM->APBCMASK.reg |= PM_APBCMASK_TCC0;

1
Marlin/src/HAL/SAMD51/Servo.cpp
View File

@@ -54,7 +54,6 @@
#define TIMER_TCCHANNEL(t) ((t) & 1) #define TIMER_TCCHANNEL(t) ((t) & 1)
#define TC_COUNTER_START_VAL 0xFFFF #define TC_COUNTER_START_VAL 0xFFFF
static volatile int8_t currentServoIndex[_Nbr_16timers]; // index for the servo being pulsed for each timer (or -1 if refresh interval) static volatile int8_t currentServoIndex[_Nbr_16timers]; // index for the servo being pulsed for each timer (or -1 if refresh interval)
FORCE_INLINE static uint16_t getTimerCount() { FORCE_INLINE static uint16_t getTimerCount() {

4
Marlin/src/HAL/SAMD51/fastio.h
View File

@@ -130,7 +130,7 @@
#ifdef ADAFRUIT_GRAND_CENTRAL_M4 #ifdef ADAFRUIT_GRAND_CENTRAL_M4
/* /**
* Adafruit Grand Central M4 has a lot of PWMs the availables are listed here. * Adafruit Grand Central M4 has a lot of PWMs the availables are listed here.
* Some of these share the same source and so can't be used in the same time * Some of these share the same source and so can't be used in the same time
*/ */
@@ -176,7 +176,7 @@
#define digitalPinToAnalogInput(P) (WITHIN(P, 67, 74) ? (P) - 67 : WITHIN(P, 54, 61) ? 8 + (P) - 54 : WITHIN(P, 12, 13) ? 16 + (P) - 12 : P == 9 ? 18 : -1) #define digitalPinToAnalogInput(P) (WITHIN(P, 67, 74) ? (P) - 67 : WITHIN(P, 54, 61) ? 8 + (P) - 54 : WITHIN(P, 12, 13) ? 16 + (P) - 12 : P == 9 ? 18 : -1)
/* /**
* pins * pins
*/ */

2
Marlin/src/HAL/SAMD51/spi_pins.h
View File

@@ -27,7 +27,7 @@
#ifdef ADAFRUIT_GRAND_CENTRAL_M4 #ifdef ADAFRUIT_GRAND_CENTRAL_M4
/* /**
* AGCM4 Default SPI Pins * AGCM4 Default SPI Pins
* *
* SS SCK MISO MOSI * SS SCK MISO MOSI

7
Marlin/src/HAL/STM32/HAL.cpp
View File

@@ -1,10 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2017 Victor Perez * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

7
Marlin/src/HAL/STM32/HAL.h
View File

@@ -1,10 +1,9 @@
/** /**
* Marlin 3D Printer Firmware * Marlin 3D Printer Firmware
*
* Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin] * Copyright (c) 2020 MarlinFirmware [https://github.com/MarlinFirmware/Marlin]
* Copyright (c) 2016 Bob Cousins bobcousins42@googlemail.com *
* Copyright (c) 2015-2016 Nico Tonnhofer wurstnase.reprap@gmail.com * Based on Sprinter and grbl.
* Copyright (c) 2017 Victor Perez * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/STM32/HAL_SPI.cpp
View File

@@ -4,7 +4,6 @@
* *
* Based on Sprinter and grbl. * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* Copyright (c) 2017 Victor Perez
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/STM32/MinSerial.cpp
View File

@@ -4,7 +4,6 @@
* *
* Based on Sprinter and grbl. * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* Copyright (c) 2017 Victor Perez
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

1
Marlin/src/HAL/STM32/Servo.cpp
View File

@@ -4,7 +4,6 @@
* *
* Based on Sprinter and grbl. * Based on Sprinter and grbl.
* Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm * Copyright (c) 2011 Camiel Gubbels / Erik van der Zalm
* Copyright (c) 2017 Victor Perez
* *
* This program is free software: you can redistribute it and/or modify * This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by * it under the terms of the GNU General Public License as published by

Some files were not shown because too many files have changed in this diff Show More