6.7: Restore "drm/amd/pm: fix the high voltage and temperature issue" revert. This was *not* fixed in 6.7.3
Partially reverts ff6599dad3
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Tk-Glitch
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425ac0f897
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46b67847a4
@ -97,3 +97,240 @@ index f4b210ab061291..837d0dbb28ea08 100644
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depends on HAVE_ARCH_MMAP_RND_COMPAT_BITS
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depends on HAVE_ARCH_MMAP_RND_COMPAT_BITS
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help
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help
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This value can be used to select the number of bits to use to
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This value can be used to select the number of bits to use to
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From 3cfb591e23181791195a74efe2e9065e0d4bd201 Mon Sep 17 00:00:00 2001
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From: Etienne JUVIGNY <ti3nou@gmail.com>
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Date: Mon, 15 Jan 2024 19:09:39 +0100
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Subject: Revert: drm/amd/pm: fix the high voltage and temperature issue
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This was supposed to fix the high voltage and temperature issue after the driver is unloaded on smu 13.0.0,
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smu 13.0.7 and smu 13.0.10, but introduced an arguably more annoying issue. Let's revert it until a proper fix is offered.
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Fixes rdna3 shutdown/reboot hang.
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diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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index 93cf73d6f..960966f4b 100644
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--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
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@@ -4050,23 +4050,13 @@ int amdgpu_device_init(struct amdgpu_device *adev,
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}
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}
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} else {
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- switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
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- case IP_VERSION(13, 0, 0):
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- case IP_VERSION(13, 0, 7):
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- case IP_VERSION(13, 0, 10):
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- r = psp_gpu_reset(adev);
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- break;
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- default:
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- tmp = amdgpu_reset_method;
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- /* It should do a default reset when loading or reloading the driver,
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- * regardless of the module parameter reset_method.
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- */
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- amdgpu_reset_method = AMD_RESET_METHOD_NONE;
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- r = amdgpu_asic_reset(adev);
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- amdgpu_reset_method = tmp;
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- break;
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- }
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-
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+ tmp = amdgpu_reset_method;
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+ /* It should do a default reset when loading or reloading the driver,
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+ * regardless of the module parameter reset_method.
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+ */
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+ amdgpu_reset_method = AMD_RESET_METHOD_NONE;
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+ r = amdgpu_asic_reset(adev);
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+ amdgpu_reset_method = tmp;
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if (r) {
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dev_err(adev->dev, "asic reset on init failed\n");
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goto failed;
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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index e1a5ee911..308ebeb43 100644
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--- a/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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+++ b/drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
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@@ -733,7 +733,7 @@ static int smu_early_init(void *handle)
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smu->adev = adev;
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smu->pm_enabled = !!amdgpu_dpm;
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smu->is_apu = false;
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- smu->smu_baco.state = SMU_BACO_STATE_NONE;
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+ smu->smu_baco.state = SMU_BACO_STATE_EXIT;
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smu->smu_baco.platform_support = false;
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smu->user_dpm_profile.fan_mode = -1;
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@@ -1753,31 +1753,10 @@ static int smu_smc_hw_cleanup(struct smu_context *smu)
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return 0;
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}
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-static int smu_reset_mp1_state(struct smu_context *smu)
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-{
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- struct amdgpu_device *adev = smu->adev;
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- int ret = 0;
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-
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- if ((!adev->in_runpm) && (!adev->in_suspend) &&
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- (!amdgpu_in_reset(adev)))
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- switch (amdgpu_ip_version(adev, MP1_HWIP, 0)) {
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- case IP_VERSION(13, 0, 0):
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- case IP_VERSION(13, 0, 7):
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- case IP_VERSION(13, 0, 10):
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- ret = smu_set_mp1_state(smu, PP_MP1_STATE_UNLOAD);
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- break;
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- default:
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- break;
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- }
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-
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- return ret;
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-}
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-
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static int smu_hw_fini(void *handle)
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{
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struct amdgpu_device *adev = (struct amdgpu_device *)handle;
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struct smu_context *smu = adev->powerplay.pp_handle;
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- int ret;
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if (amdgpu_sriov_vf(adev) && !amdgpu_sriov_is_pp_one_vf(adev))
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return 0;
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@@ -1795,15 +1774,7 @@ static int smu_hw_fini(void *handle)
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adev->pm.dpm_enabled = false;
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- ret = smu_smc_hw_cleanup(smu);
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- if (ret)
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- return ret;
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-
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- ret = smu_reset_mp1_state(smu);
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- if (ret)
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- return ret;
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-
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- return 0;
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+ return smu_smc_hw_cleanup(smu);
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}
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static void smu_late_fini(void *handle)
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
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index f8b2e6cc2..e8329d157 100644
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--- a/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
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+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/amdgpu_smu.h
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@@ -419,7 +419,6 @@ enum smu_reset_mode {
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enum smu_baco_state {
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SMU_BACO_STATE_ENTER = 0,
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SMU_BACO_STATE_EXIT,
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- SMU_BACO_STATE_NONE,
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};
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struct smu_baco_context {
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
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index 95cb91971..cc02f979e 100644
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--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
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+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
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@@ -299,7 +299,5 @@ int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
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uint8_t pcie_gen_cap,
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uint8_t pcie_width_cap);
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-int smu_v13_0_disable_pmfw_state(struct smu_context *smu);
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-
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#endif
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#endif
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
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index cf1b84060..a49e5adf7 100644
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--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
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+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
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@@ -2477,16 +2477,3 @@ int smu_v13_0_update_pcie_parameters(struct smu_context *smu,
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return 0;
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}
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-
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-int smu_v13_0_disable_pmfw_state(struct smu_context *smu)
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-{
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- int ret;
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- struct amdgpu_device *adev = smu->adev;
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-
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- WREG32_PCIE(MP1_Public | (smnMP1_FIRMWARE_FLAGS & 0xffffffff), 0);
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-
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- ret = RREG32_PCIE(MP1_Public |
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- (smnMP1_FIRMWARE_FLAGS & 0xffffffff));
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-
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- return ret == 0 ? 0 : -EINVAL;
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-}
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
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index 82c4e1f1c..2ba77b1d1 100644
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--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
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+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
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@@ -2574,20 +2574,14 @@ static int smu_v13_0_0_baco_enter(struct smu_context *smu)
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static int smu_v13_0_0_baco_exit(struct smu_context *smu)
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{
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struct amdgpu_device *adev = smu->adev;
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- int ret;
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if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev)) {
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/* Wait for PMFW handling for the Dstate change */
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usleep_range(10000, 11000);
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- ret = smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
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+ return smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
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} else {
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- ret = smu_v13_0_baco_exit(smu);
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+ return smu_v13_0_baco_exit(smu);
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}
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-
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- if (!ret)
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- adev->gfx.is_poweron = false;
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-
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- return ret;
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}
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static bool smu_v13_0_0_is_mode1_reset_supported(struct smu_context *smu)
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@@ -2772,13 +2766,7 @@ static int smu_v13_0_0_set_mp1_state(struct smu_context *smu,
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switch (mp1_state) {
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case PP_MP1_STATE_UNLOAD:
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- ret = smu_cmn_send_smc_msg_with_param(smu,
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- SMU_MSG_PrepareMp1ForUnload,
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- 0x55, NULL);
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-
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- if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
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- ret = smu_v13_0_disable_pmfw_state(smu);
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-
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+ ret = smu_cmn_set_mp1_state(smu, mp1_state);
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break;
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default:
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/* Ignore others */
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diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
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index 81eafed76..19c1289d0 100644
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--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
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+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_7_ppt.c
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@@ -2499,13 +2499,7 @@ static int smu_v13_0_7_set_mp1_state(struct smu_context *smu,
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switch (mp1_state) {
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case PP_MP1_STATE_UNLOAD:
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- ret = smu_cmn_send_smc_msg_with_param(smu,
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- SMU_MSG_PrepareMp1ForUnload,
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- 0x55, NULL);
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-
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- if (!ret && smu->smu_baco.state == SMU_BACO_STATE_EXIT)
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- ret = smu_v13_0_disable_pmfw_state(smu);
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-
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+ ret = smu_cmn_set_mp1_state(smu, mp1_state);
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break;
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default:
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/* Ignore others */
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@@ -2531,20 +2525,14 @@ static int smu_v13_0_7_baco_enter(struct smu_context *smu)
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static int smu_v13_0_7_baco_exit(struct smu_context *smu)
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{
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struct amdgpu_device *adev = smu->adev;
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- int ret;
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if (adev->in_runpm && smu_cmn_is_audio_func_enabled(adev)) {
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/* Wait for PMFW handling for the Dstate change */
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usleep_range(10000, 11000);
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- ret = smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
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+ return smu_v13_0_baco_set_armd3_sequence(smu, BACO_SEQ_ULPS);
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} else {
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- ret = smu_v13_0_baco_exit(smu);
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+ return smu_v13_0_baco_exit(smu);
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}
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-
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- if (!ret)
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- adev->gfx.is_poweron = false;
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-
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- return ret;
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}
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static bool smu_v13_0_7_is_mode1_reset_supported(struct smu_context *smu)
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