sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/brox: Add new GFX devices

Browse Source 
Add GFX devices for DDI (eDP and HDMI) and TCP (USC C0 and C2
ports). Copied the PLD placements from USB PLDs.

BUG=b:300690448
BRANCH=None
TEST=emerge-brox coreboot

Change-Id: Ic39916819f64ede1c80eccfd05ba4916b9f285af
Signed-off-by: Shelley Chen <shchen@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79731
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
This commit is contained in:
Shelley Chen
2023-12-26 11:01:31 -08:00
parent b6dfcb7d18
commit 00a9bc68fe
1 changed files with 23 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
src/mainboard/google/brox/variants/brox/overridetree.cb
View File

@@ -1,5 +1,28 @@
chip soc/intel/alderlake chip soc/intel/alderlake
device domain 0 on device domain 0 on
device ref igpu on
chip drivers/gfx/generic
register "device_count" = "6"
# DDIA for eDP
register "device[0].name" = ""LCD""
# DDIB for HDMI
# If HDMI is not enumerated in the kernel, then no GFX device should be added for DDIB
register "device[1].name" = ""DD01""
# TCP0 (DP-1) for port C0
register "device[2].name" = ""DD02""
register "device[2].use_pld" = "true"
register "device[2].pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(1, 1))"
# TCP1 (DP-2) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP1
register "device[3].name" = ""DD03""
# TCP2 (DP-3) for port C2
register "device[4].name" = ""DD04""
register "device[4].use_pld" = "true"
register "device[4].pld" = "ACPI_PLD_TYPE_C(LEFT, RIGHT, ACPI_PLD_GROUP(2, 1))"
# TCP3 (DP-4) is unused for any ports but still enumerated in the kernel, so GFX device is added for TCP3
register "device[5].name" = ""DD05""
device generic 0 on end
end
end # Integrated Graphics Device
device ref pch_espi on device ref pch_espi on
chip ec/google/chromeec chip ec/google/chromeec
use conn0 as mux_conn[0] use conn0 as mux_conn[0]