From 00c95b13ab8166c858a237f27077f51ebfcec5b1 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 4 Jun 2021 11:58:37 +0200 Subject: [PATCH] cpu/intel/model_206ax: Do not set PMG_IO_CAPTURE_ADDR MSR The MSR only needs to be set when IO MWAIT redirection is to be enabled. Change-Id: Ie856086babe4dadc690f701bd90a7bbac88cb4ad Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/55213 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/cpu/intel/model_206ax/model_206ax_init.c | 6 ------ 1 file changed, 6 deletions(-) diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index beb885ea72..7a40644a6f 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -172,12 +172,6 @@ static void configure_c_states(void) msr.lo |= (1 << 15); // Lock C-State MSR wrmsr(MSR_PKG_CST_CONFIG_CONTROL, msr); - msr = rdmsr(MSR_PMG_IO_CAPTURE_ADDR); - msr.lo &= ~0x7ffff; - msr.lo |= (PMB0_BASE + 4); // LVL_2 base address - msr.lo |= (2 << 16); // CST Range: C7 is max C-state - wrmsr(MSR_PMG_IO_CAPTURE_ADDR, msr); - msr = rdmsr(MSR_MISC_PWR_MGMT); msr.lo &= ~(1 << 0); // Enable P-state HW_ALL coordination wrmsr(MSR_MISC_PWR_MGMT, msr);