sb/intel/i82801jx: Drop Global NVS support
Was copy-pasted from i82801ix and no mainboard actually needs it. Change-Id: I400424540b52dc5d43aba15720b18ad57ea2ebda Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49279 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Angel Pons
Kyösti Mälkki
parent
aa969e887a
commit
00f11c0290
@ -15,7 +15,6 @@ DefinitionBlock(
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OSYS = 2002
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OSYS = 2002
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// global NVS and variables
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// global NVS and variables
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
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Device (\_SB.PCI0)
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Device (\_SB.PCI0)
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{
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{
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@ -15,7 +15,6 @@ DefinitionBlock(
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OSYS = 2002
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OSYS = 2002
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// global NVS and variables
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// global NVS and variables
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
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Scope (\_SB) {
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Scope (\_SB) {
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Device (PCI0)
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Device (PCI0)
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@ -17,7 +17,6 @@ DefinitionBlock(
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OSYS = 2002
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OSYS = 2002
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// global NVS and variables
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// global NVS and variables
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
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Scope (\_SB) {
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Scope (\_SB) {
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Device (PCI0)
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Device (PCI0)
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@ -15,7 +15,6 @@ DefinitionBlock(
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OSYS = 2002
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OSYS = 2002
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// global NVS and variables
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// global NVS and variables
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/common/acpi/platform.asl>
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#include <southbridge/intel/i82801jx/acpi/globalnvs.asl>
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Scope (\_SB) {
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Scope (\_SB) {
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Device (PCI0)
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Device (PCI0)
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@ -3,7 +3,6 @@
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config SOUTHBRIDGE_INTEL_I82801JX
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config SOUTHBRIDGE_INTEL_I82801JX
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bool
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bool
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ACPI_INTEL_HARDWARE_SLEEP_VALUES
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select ACPI_SOC_NVS
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select AZALIA_PLUGIN_SUPPORT
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select AZALIA_PLUGIN_SUPPORT
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
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@ -1,106 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/* Global Variables */
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Field (GNVS, ByteAcc, NoLock, Preserve)
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{
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/* Miscellaneous */
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, 16, // 0x00 - Operating System
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SMIF, 8, // 0x02 - SMI function
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PRM0, 8, // 0x03 - SMI function parameter
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PRM1, 8, // 0x04 - SMI function parameter
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SCIF, 8, // 0x05 - SCI function
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PRM2, 8, // 0x06 - SCI function parameter
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PRM3, 8, // 0x07 - SCI function parameter
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LCKF, 8, // 0x08 - Global Lock function for EC
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PRM4, 8, // 0x09 - Lock function parameter
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PRM5, 8, // 0x0a - Lock function parameter
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P80D, 32, // 0x0b - Debug port (IO 0x80) value
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LIDS, 8, // 0x0f - LID state (open = 1)
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, 8, // 0x10 - Power State (AC = 1)
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DBGS, 8, // 0x11 - Debug State
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LINX, 8, // 0x12 - Linux OS
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DCKN, 8, // 0x13 - PCIe docking state
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/* Thermal policy */
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Offset (0x14),
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ACTT, 8, // 0x14 - active trip point
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TPSV, 8, // 0x15 - passive trip point
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TC1V, 8, // 0x16 - passive trip point TC1
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TC2V, 8, // 0x17 - passive trip point TC2
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TSPV, 8, // 0x18 - passive trip point TSP
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TCRT, 8, // 0x19 - critical trip point
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DTSE, 8, // 0x1a - Digital Thermal Sensor enable
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DTS1, 8, // 0x1b - DT sensor 1
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FLVL, 8, // 0x1c - current fan level
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/* Battery Support */
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Offset (0x1e),
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BNUM, 8, // 0x1e - number of batteries
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B0SC, 8, // 0x1f - BAT0 stored capacity
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B1SC, 8, // 0x20 - BAT1 stored capacity
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B2SC, 8, // 0x21 - BAT2 stored capacity
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B0SS, 8, // 0x22 - BAT0 stored status
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B1SS, 8, // 0x23 - BAT1 stored status
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B2SS, 8, // 0x24 - BAT2 stored status
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/* Processor Identification */
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Offset (0x28),
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, 8, // 0x28 - Enabled by coreboot
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, 8, // 0x29 - Multi Processor Enable
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PCP0, 8, // 0x2a - PDC CPU/CORE 0
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PCP1, 8, // 0x2b - PDC CPU/CORE 1
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PPCM, 8, // 0x2c - Max. PPC state
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/* Super I/O & CMOS config */
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Offset (0x32),
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NATP, 8, // 0x32 -
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CMAP, 8, // 0x33 -
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CMBP, 8, // 0x34 -
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LPTP, 8, // 0x35 - LPT Port
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FDCP, 8, // 0x36 - Floppy Disk Controller
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RFDV, 8, // 0x37 -
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HOTK, 8, // 0x38 -
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RTCF, 8, // 0x39 -
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UTIL, 8, // 0x3a -
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ACIN, 8, // 0x3b -
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/* Integrated Graphics Device */
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Offset (0x3c),
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IGDS, 8, // 0x3c - IGD state (primary = 1)
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TLST, 8, // 0x3d - Display Toggle List pointer
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CADL, 8, // 0x3e - Currently Attached Devices List
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PADL, 8, // 0x3f - Previously Attached Devices List
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/* Backlight Control */
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Offset (0x64),
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BLCS, 8, // 0x64 - Backlight control possible?
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BRTL, 8, // 0x65 - Brightness Level
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ODDS, 8, // 0x66
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/* Ambient Light Sensors */
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Offset (0x6e),
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ALSE, 8, // 0x6e - ALS enable
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ALAF, 8, // 0x6f - Ambient light adjustment factor
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LLOW, 8, // 0x70 - LUX Low
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LHIH, 8, // 0x71 - LUX High
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/* EMA */
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Offset (0x78),
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EMAE, 8, // 0x78 - EMA enable
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EMAP, 16, // 0x79 - EMA pointer
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EMAL, 16, // 0x7b - EMA length
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/* MEF */
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Offset (0x82),
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MEFE, 8, // 0x82 - MEF enable
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/* TPM support */
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Offset (0x8c),
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TPMP, 8, // 0x8c - TPM
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TPME, 8, // 0x8d - TPM enable
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/* SATA */
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Offset (0x96),
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GTF0, 56, // 0x96 - GTF task file buffer for port 0
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GTF1, 56, // 0x9d - GTF task file buffer for port 1
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GTF2, 56, // 0xa4 - GTF task file buffer for port 2
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IDEM, 8, // 0xab - IDE mode (compatible / enhanced)
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IDET, 8, // 0xac - IDE
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/* Mainboard Specific (TODO move elsewhere) */
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Offset (0xf0),
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DOCK, 8, // 0xf0 - Docking Status
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BTEN, 8, // 0xf1 - Bluetooth Enable
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CBMC, 32,
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PM1I, 32, // System Wake Source - PM1 Index
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GPEI, 32, // GPE Wake Source
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}
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@ -1,106 +0,0 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef SOUTHBRIDGE_INTEL_I82801JX_NVS_H
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#define SOUTHBRIDGE_INTEL_I82801JX_NVS_H
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#include <stdint.h>
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struct __packed global_nvs {
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/* Miscellaneous */
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u16 unused_was_osys; /* 0x00 - Operating System */
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u8 smif; /* 0x02 - SMI function call ("TRAP") */
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u8 prm0; /* 0x03 - SMI function call parameter */
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u8 prm1; /* 0x04 - SMI function call parameter */
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u8 scif; /* 0x05 - SCI function call (via _L00) */
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u8 prm2; /* 0x06 - SCI function call parameter */
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u8 prm3; /* 0x07 - SCI function call parameter */
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u8 lckf; /* 0x08 - Global Lock function for EC */
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u8 prm4; /* 0x09 - Lock function parameter */
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u8 prm5; /* 0x0a - Lock function parameter */
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u32 p80d; /* 0x0b - Debug port (IO 0x80) value */
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u8 lids; /* 0x0f - LID state (open = 1) */
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u8 unused_was_pwrs; /* 0x10 - Power state (AC = 1) */
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u8 dbgs; /* 0x11 - Debug state */
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u8 linx; /* 0x12 - Linux OS */
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u8 dckn; /* 0x13 - PCIe docking state */
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/* Thermal policy */
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u8 actt; /* 0x14 - active trip point */
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u8 tpsv; /* 0x15 - passive trip point */
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u8 tc1v; /* 0x16 - passive trip point TC1 */
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u8 tc2v; /* 0x17 - passive trip point TC2 */
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u8 tspv; /* 0x18 - passive trip point TSP */
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u8 tcrt; /* 0x19 - critical trip point */
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u8 dtse; /* 0x1a - Digital Thermal Sensor enable */
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u8 dts1; /* 0x1b - DT sensor 1 */
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u8 flvl; /* 0x1c - current fan level */
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u8 rsvd2;
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/* Battery Support */
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u8 bnum; /* 0x1e - number of batteries */
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u8 b0sc, b1sc, b2sc; /* 0x1f-0x21 - stored capacity */
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u8 b0ss, b1ss, b2ss; /* 0x22-0x24 - stored status */
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u8 rsvd3[3];
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/* Processor Identification */
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u8 unused_was_apic; /* 0x28 - APIC enabled */
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u8 unused_was_mpen; /* 0x29 - MP capable/enabled */
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u8 pcp0; /* 0x2a - PDC CPU/CORE 0 */
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u8 pcp1; /* 0x2b - PDC CPU/CORE 1 */
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u8 ppcm; /* 0x2c - Max. PPC state */
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u8 rsvd4[5];
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/* Super I/O & CMOS config */
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u8 natp; /* 0x32 - SIO type */
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u8 cmap; /* 0x33 - */
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u8 cmbp; /* 0x34 - */
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u8 lptp; /* 0x35 - LPT port */
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u8 fdcp; /* 0x36 - Floppy Disk Controller */
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u8 rfdv; /* 0x37 - */
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u8 hotk; /* 0x38 - Hot Key */
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u8 rtcf;
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u8 util;
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u8 acin;
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/* Integrated Graphics Device */
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u8 igds; /* 0x3c - IGD state */
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u8 tlst; /* 0x3d - Display Toggle List Pointer */
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u8 cadl; /* 0x3e - currently attached devices */
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u8 padl; /* 0x3f - previously attached devices */
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u8 rsvd5[36];
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/* Backlight Control */
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u8 blcs; /* 0x64 - Backlight Control possible */
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u8 brtl;
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u8 odds;
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u8 rsvd6[0x7];
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/* Ambient Light Sensors*/
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u8 alse; /* 0x6e - ALS enable */
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u8 alaf;
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u8 llow;
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u8 lhih;
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u8 rsvd7[0x6];
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/* EMA */
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u8 emae; /* 0x78 - EMA enable */
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u16 emap;
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u16 emal;
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u8 rsvd8[0x5];
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/* MEF */
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u8 mefe; /* 0x82 - MEF enable */
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u8 rsvd9[0x9];
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/* TPM support */
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u8 tpmp; /* 0x8c - TPM */
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u8 tpme;
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u8 rsvd10[8];
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/* SATA */
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u8 gtf0[7]; /* 0x96 - GTF task file buffer for port 0 */
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u8 gtf1[7];
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u8 gtf2[7];
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u8 idem;
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u8 idet;
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u8 rsvd11[67];
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/* Mainboard specific */
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u8 dock; /* 0xf0 - Docking Status */
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u8 bten;
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u32 cbmc;
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/* Required for future unified acpi_save_wake_source. */
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u32 pm1i;
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u32 gpei;
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};
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#endif /* SOUTHBRIDGE_INTEL_I82801JX_NVS_H */
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@ -4,7 +4,6 @@
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#include <console/console.h>
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#include <console/console.h>
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#include <cpu/x86/smm.h>
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#include <cpu/x86/smm.h>
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#include <device/pci_def.h>
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#include <device/pci_def.h>
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#include <soc/nvs.h>
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#include <southbridge/intel/common/pmutil.h>
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#include <southbridge/intel/common/pmutil.h>
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#include "i82801jx.h"
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#include "i82801jx.h"
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@ -13,23 +12,6 @@
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*/
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*/
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u16 pmbase = DEFAULT_PMBASE;
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u16 pmbase = DEFAULT_PMBASE;
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int southbridge_io_trap_handler(int smif)
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{
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switch (smif) {
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case 0x32:
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printk(BIOS_DEBUG, "OS Init\n");
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/* gnvs->smif:
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* On success, the IO Trap Handler returns 0
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* On failure, the IO Trap Handler returns a value != 0
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*/
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gnvs->smif = 0;
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return 1; /* IO trap handled */
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}
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/* Not handled */
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return 0;
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}
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void southbridge_smi_monitor(void)
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void southbridge_smi_monitor(void)
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{
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{
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#define IOTRAP(x) (trap_sts & (1 << x))
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#define IOTRAP(x) (trap_sts & (1 << x))
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@ -46,10 +28,9 @@ void southbridge_smi_monitor(void)
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mask |= (0xff << ((i - 16) << 3));
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mask |= (0xff << ((i - 16) << 3));
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}
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}
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/* IOTRAP(3) SMI function call */
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/* IOTRAP(3) SMI function call (unused) */
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if (IOTRAP(3)) {
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if (IOTRAP(3)) {
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if (gnvs && gnvs->smif)
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printk(BIOS_DEBUG, "SMI function call not implemented\n");
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io_trap_handler(gnvs->smif); // call function smif
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return;
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return;
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}
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}
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