util/inteltool: Add GPIO dumping capabilites for Ice Lake U systems

This GPIO dumping was implemented using the

Document Number: 341080-001
Intel® 495 Series Chipset Family On-Package Platform Controller Hub
Volume 1 of 2

datasheet. The GPIO community ports can be found in table 36-1, while
the community and pin descriptions are taken from
linux/pinctrl/intel/pinctrl-icelake.c .
This commit was tested on the late 2019 Razer Blade Stealth with 1065G7
and Chipset 495 PCH and the output manually compared against
linux/pinctrl-intel.

Change-Id: Ib40f1dbae57169678e92ea9ad0df60ff91b5b22c
Signed-off-by: Johanna Schander <coreboot@mimoja.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38175
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Alexander Couzens <lynxis@fe80.eu>

util/inteltool/pcr.c

@@ -132,6 +132,7 @@ void pcr_init(struct pci_dev *const sb)
 	case PCI_DEVICE_ID_INTEL_QM370:
 	case PCI_DEVICE_ID_INTEL_HM370:
 	case PCI_DEVICE_ID_INTEL_CM246:
+	case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U:
 		sbbar_phys = 0xfd000000;
 		use_p2sb = false;
 		break;