- Update abuild.sh so it will rebuild successfull builds

- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/include/device/device.h

@@ -14,8 +14,17 @@ struct smbus_bus_operations;
 /* Chip operations */
 struct chip_operations {
 	void (*enable_dev)(struct device *dev);
+#if CONFIG_CHIP_NAME == 1
+	char *name;
+#endif
 };
 
+#if CONFIG_CHIP_NAME == 1
+#define CHIP_NAME(X) .name = X,
+#else
+#define CHIP_NAME(X)
+#endif
+
 struct device_operations {
 	void (*read_resources)(device_t dev);
 	void (*set_resources)(device_t dev);

src/include/device/pci_ops.h

@@ -3,6 +3,7 @@
 
 #include <stdint.h>
 #include <device/device.h>
+#include <arch/pci_ops.h>
 
 uint8_t  pci_read_config8(device_t dev, unsigned where);
 uint16_t pci_read_config16(device_t dev, unsigned where);
@@ -11,6 +12,4 @@ void pci_write_config8(device_t dev, unsigned where, uint8_t val);
 void pci_write_config16(device_t dev, unsigned where, uint16_t val);
 void pci_write_config32(device_t dev, unsigned where, uint32_t val);
 
-void pci_set_method(void);
-
 #endif /* PCI_OPS_H */