- Update abuild.sh so it will rebuild successfull builds

- Move pci_set_method out of hardwaremain.c
- Re-add debugging name field but only include the CONFIG_CHIP_NAME is
  enabled.  All instances are now wrapped in CHIP_NAME
- Many minor cleanups so most ports build.


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman
2004-11-04 11:04:33 +00:00
parent 4403f60823
commit 018d8dd60f
116 changed files with 1397 additions and 3197 deletions

View File

@@ -71,5 +71,6 @@ static void enable_dev(struct device *dev)
}
struct chip_operations superio_NSC_pc87360_ops = {
CHIP_NAME("NSC 87360")
.enable_dev = enable_dev,
};

View File

@@ -5,7 +5,7 @@
#define SIO_COM2_BASE 0x2F8
#endif
extern struct chip_operations superio_NSC_pc87366_control;
extern struct chip_operations superio_NSC_pc87366_ops;
#include <pc80/keyboard.h>
#include <uart8250.h>

View File

@@ -66,11 +66,11 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(struct device *dev)
{
pnp_enable_device(dev, &pnp_ops,
pnp_enable_devices(dev, &pnp_ops,
sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
}
struct chip_operations superio_NSC_pc87366_control = {
struct chip_operations superio_NSC_pc87366_ops = {
CHIP_NAME("NSC 87366")
.enable_dev = enable_dev,
.name = "NSC 87366"
};

View File

@@ -72,11 +72,11 @@ static struct pnp_info pnp_dev_info[] = {
static void enable_dev(struct device *dev)
{
pnp_enable_device(dev, &pnp_ops,
pnp_enable_devices(dev, &pnp_ops,
sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
}
struct chip_operations superio_NSC_pc97307_control = {
CHIP_NAME("NSC 97307")
.enable_dev = enable_dev,
.name = "NSC 97307"
};

View File

@@ -142,7 +142,7 @@ static void enumerate(struct chip *chip)
}
struct chip_operations superio_via_vt1211_control = {
CHIP_NAME("VIA vt1211")
.enumerate = enumerate,
.enable = superio_init,
.name = "VIA vt1211"
};

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@@ -16,21 +16,23 @@
#include "w83627hf.h"
void pnp_enter_ext_func_mode(device_t dev) {
static void pnp_enter_ext_func_mode(device_t dev)
{
outb(0x87, dev->path.u.pnp.port);
outb(0x87, dev->path.u.pnp.port);
}
void pnp_exit_ext_func_mode(device_t dev) {
static void pnp_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.u.pnp.port);
}
void pnp_write_hwm(unsigned long port_base, uint8_t reg, uint8_t value)
static void pnp_write_hwm(unsigned long port_base, uint8_t reg, uint8_t value)
{
outb(reg, port_base+5);
outb(value, port_base+6);
}
uint8_t pnp_read_hwm(unsigned long port_base, uint8_t reg)
static uint8_t pnp_read_hwm(unsigned long port_base, uint8_t reg)
{
outb(reg, port_base + 5);
return inb(port_base + 6);
@@ -215,7 +217,7 @@ static void enable_dev(struct device *dev)
}
struct chip_operations superio_winbond_w83627hf_ops = {
// .name = "Winbond w83627hf",
CHIP_NAME("Winbond w83627hf")
.enable_dev = enable_dev,
};

View File

@@ -1,12 +1,14 @@
#include <arch/romcc_io.h>
#include "w83627hf.h"
static inline void pnp_enter_ext_func_mode(device_t dev) {
static inline void pnp_enter_ext_func_mode(device_t dev)
{
unsigned port = dev>>8;
outb(0x87, port);
outb(0x87, port);
}
static void pnp_exit_ext_func_mode(device_t dev) {
static void pnp_exit_ext_func_mode(device_t dev)
{
unsigned port = dev>>8;
outb(0xaa, port);
}

View File

@@ -5,7 +5,7 @@
#define SIO_COM2_BASE 0x2F8
#endif
extern struct chip_operations superio_winbond_w83627thf_control;
extern struct chip_operations superio_winbond_w83627thf_ops;
#include <pc80/keyboard.h>
#include <uart8250.h>

View File

@@ -15,27 +15,37 @@
#include "chip.h"
#include "w83627thf.h"
static void init(device_t dev)
static void w83627thf_enter_ext_func_mode(device_t dev)
{
outb(0x87, dev->path.u.pnp.port);
outb(0x87, dev->path.u.pnp.port);
}
static void w83627thf_exit_ext_func_mode(device_t dev)
{
outb(0xaa, dev->path.u.pnp.port);
}
static void w83627thf_init(device_t dev)
{
struct superio_winbond_w83627thf_config *conf;
struct resource *res0, *res1;
/* Wishlist handle well known programming interfaces more
* generically.
*/
if (!dev->enable) {
if (!dev->enabled) {
return;
}
conf = dev->chip_info;
switch(dev->path.u.pnp.device) {
case W83627HF_SP1:
case W83627THF_SP1:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com1);
break;
case W83627HF_SP2:
case W83627THF_SP2:
res0 = find_resource(dev, PNP_IDX_IO0);
init_uart8250(res0->base, &conf->com2);
break;
case W83627HF_KBC:
case W83627THF_KBC:
res0 = find_resource(dev, PNP_IDX_IO0);
res1 = find_resource(dev, PNP_IDX_IO1);
init_pc_keyboard(res0->base, res1->base, &conf->keyboard);
@@ -43,36 +53,58 @@ static void init(device_t dev)
}
}
static void w83627thf_set_resources(device_t dev)
{
w83627thf_enter_ext_func_mode(dev);
pnp_set_resources(dev);
w83627thf_exit_ext_func_mode(dev);
}
static void w83627thf_enable_resources(device_t dev)
{
w83627thf_enter_ext_func_mode(dev);
pnp_enable_resources(dev);
w83627thf_exit_ext_func_mode(dev);
}
static void w83627thf_enable(device_t dev)
{
w83627thf_enter_ext_func_mode(dev);
pnp_enable(dev);
w83627thf_exit_ext_func_mode(dev);
}
static struct device_operations ops = {
.read_resources = pnp_read_resources,
.set_resources = pnp_set_resources,
.enable_resources = pnp_enable_resources,
.enable = pnp_enable,
.init = init,
.set_resources = w83627thf_set_resources,
.enable_resources = w83627thf_enable_resources,
.enable = w83627thf_enable,
.init = w83627thf_init,
};
static struct pnp_info pnp_dev_info[] = {
{ &ops, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627THF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, { 0x07f8, 0}, },
{ &ops, W83627THF_SP1, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_SP2, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
// No 4 { 0,},
{ &ops, W83627HF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627HF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
// { W83627HF_GPIO2,},
// { W83627HF_GPIO3,},
{ &ops, W83627HF_ACPI, PNP_IRQ0, },
{ &ops, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
{ &ops, W83627THF_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, { 0x7ff, 0 }, { 0x7ff, 0x4}, },
{ &ops, W83627THF_CIR, PNP_IO0 | PNP_IRQ0, { 0x7f8, 0 }, },
{ &ops, W83627THF_GAME_MIDI_GPIO1, PNP_IO0 | PNP_IO1 | PNP_IRQ0, { 0x7ff, 0 }, {0x7fe, 4} },
// { W83627THF_GPIO2,},
// { W83627THF_GPIO3,},
{ &ops, W83627THF_ACPI, PNP_IRQ0, },
{ &ops, W83627THF_HWM, PNP_IO0 | PNP_IRQ0, { 0xff8, 0 } },
};
static void enable_dev(device_t dev)
{
pnp_enable_device(dev, &pnp_ops,
pnp_enable_devices(dev, &pnp_ops,
sizeof(pnp_dev_info)/sizeof(pnp_dev_info[0]), pnp_dev_info);
}
struct chip_operations superio_winbond_w83627thf_control = {
struct chip_operations superio_winbond_w83627thf_ops = {
CHIP_NAME("Winbond w83627thf")
.enable_dev = enable_dev,
.name = "Winbond w83627thf"
};