cpu/x86: Introduce and use CPU_X86_LAPIC

With using a Kconfig option to add the x86 LAPIC support code to the
build, there's no need for adding the corresponding directory to subdirs
in the CPU/SoC Makefile. Comparing which CPU/SoC Makefiles added
(cpu/)x86/mtrr and (cpu/)x86/lapic before this and the corresponding
MTRR code selection patch and having verified that all platforms
added the MTRR code on that patch shows that soc/example/min86 and
soc/intel/quark are the only platforms that don't end up selecting the
LAPIC code. So for now the default value of CPU_X86_LAPIC is chosen as y
which gets overridden to n in the Kconfig of the two SoCs mentioned
above.

Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44228
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

src/cpu/intel/haswell/Makefile.inc

@@ -15,7 +15,6 @@ bootblock-y += bootblock.c
 
 postcar-y += ../car/non-evict/exit_car.S
 
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 subdirs-y += ../turbo
 

src/cpu/intel/model_2065x/Makefile.inc

@@ -1,6 +1,5 @@
 ramstage-y += model_2065x_init.c
 subdirs-y += ../../x86/name
-subdirs-y += ../../x86/lapic
 subdirs-y += ../../intel/turbo
 subdirs-y += ../../intel/microcode
 subdirs-y += ../smm/gen1

src/cpu/intel/model_206ax/Makefile.inc

@@ -2,7 +2,6 @@ ramstage-y += model_206ax_init.c
 subdirs-y += ../../x86/name
 subdirs-y += ../smm/gen1
 
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 subdirs-y += ../turbo
 

src/cpu/intel/slot_1/Makefile.inc

@@ -7,7 +7,6 @@ subdirs-y += ../model_65x
 subdirs-y += ../model_67x
 subdirs-y += ../model_68x
 subdirs-y += ../model_6bx
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 
 bootblock-y += ../car/p3/cache_as_ram.S

src/cpu/intel/socket_441/Makefile.inc

@@ -1,5 +1,4 @@
 subdirs-y += ../model_106cx
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 subdirs-y += ../speedstep
 

src/cpu/intel/socket_BGA956/Makefile.inc

@@ -1,5 +1,4 @@
 subdirs-y += ../model_1067x
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 subdirs-y += ../speedstep
 

src/cpu/intel/socket_FCBGA559/Makefile.inc

@@ -1,5 +1,4 @@
 subdirs-y += ../model_106cx
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 subdirs-y += ../speedstep
 

src/cpu/intel/socket_LGA775/Makefile.inc

@@ -2,7 +2,6 @@ subdirs-y += ../model_6fx
 subdirs-y += ../model_f3x
 subdirs-y += ../model_f4x
 subdirs-y += ../model_1067x
-subdirs-y += ../../x86/lapic
 subdirs-y += ../microcode
 subdirs-y += ../speedstep