cpu/x86: Introduce and use CPU_X86_LAPIC

With using a Kconfig option to add the x86 LAPIC support code to the
build, there's no need for adding the corresponding directory to subdirs
in the CPU/SoC Makefile. Comparing which CPU/SoC Makefiles added
(cpu/)x86/mtrr and (cpu/)x86/lapic before this and the corresponding
MTRR code selection patch and having verified that all platforms
added the MTRR code on that patch shows that soc/example/min86 and
soc/intel/quark are the only platforms that don't end up selecting the
LAPIC code. So for now the default value of CPU_X86_LAPIC is chosen as y
which gets overridden to n in the Kconfig of the two SoCs mentioned
above.

Change-Id: I6f683ea7ba92c91117017ebc6ad063ec54902b0a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44228
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

src/cpu/x86/Kconfig

@@ -4,6 +4,10 @@ config CPU_X86_CACHE_HELPER
 	help
 	  Add the x86_enable_cache ramstage helper function to the build.
 
+config CPU_X86_LAPIC
+	bool
+	default y
+
 config PARALLEL_MP
 	def_bool y
 	depends on !LEGACY_SMP_INIT

src/cpu/x86/Makefile.inc

@@ -1,4 +1,5 @@
 subdirs-$(CONFIG_CPU_X86_CACHE_HELPER) += cache
+subdirs-$(CONFIG_CPU_X86_LAPIC) += lapic
 subdirs-y += mtrr
 subdirs-y += pae
 subdirs-$(CONFIG_HAVE_SMI_HANDLER) += smm