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soc/intel/xeon-sp,mb/ocp/tiogapass: Don't fake binaries

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If we don't pretend to have binaries, there is no need to add fake ones.
This also fixes building the default config.

Change-Id: I8f933f24a734a9ce3d82ef57f7f234ee4dfa86e9
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39383
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Nico Huber
2020-03-08 18:36:00 +01:00
committed by Philipp Deppenwiese
parent 8fb7cd4123
commit 0266be0d2b
3 changed files with 2 additions and 11 deletions
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src/drivers/intel/fsp2_0/Kconfig
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@@ -56,7 +56,7 @@ config FSP_USE_REPO
depends on SOC_INTEL_APOLLOLAKE || SOC_INTEL_SKYLAKE || \
SOC_INTEL_KABYLAKE || SOC_INTEL_COFFEELAKE || \
SOC_INTEL_ICELAKE || SOC_INTEL_WHISKEYLAKE || \
SOC_INTEL_DENVERTON_NS || SOC_INTEL_XEON_SP
SOC_INTEL_DENVERTON_NS
help
When selecting this option, the SoC must set FSP_HEADER_PATH
and FSP_FD_PATH correctly so FSP splitting works.