ACPI: Add usb_charge_mode_from_gnvs()
Early Chromebook generations stored the information about USB port power control for S3/S5 sleepstates in GNVS, although the configuration is static. Reduce code duplication and react to ACPI S4 as if it was ACPI S5 request. Change-Id: I7e6f37a023b0e9317dcf0355dfa70e28d51cdad9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74524 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
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@@ -8,7 +8,6 @@
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#include <ec/google/chromeec/smm.h>
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#include "ec.h"
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#include <soc/nvs.h>
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#include <soc/pm.h>
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/* The wake gpio is SUS_GPIO[0]. */
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@@ -25,28 +24,16 @@ void mainboard_smi_gpi(uint32_t alt_gpio_smi)
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void mainboard_smi_sleep(uint8_t slp_typ)
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{
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/* Disable USB charging if required */
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chromeec_set_usb_charge_mode(slp_typ);
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switch (slp_typ) {
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case ACPI_S3:
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if (gnvs->s3u0 == 0)
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google_chromeec_set_usb_charge_mode(
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0, USB_CHARGE_MODE_DISABLED);
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if (gnvs->s3u1 == 0)
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google_chromeec_set_usb_charge_mode(
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1, USB_CHARGE_MODE_DISABLED);
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/* Enable wake events */
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google_chromeec_set_wake_mask(MAINBOARD_EC_S3_WAKE_EVENTS);
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/* Enable wake pin in GPE block. */
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enable_gpe(WAKE_GPIO_EN);
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break;
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case ACPI_S5:
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if (gnvs->s5u0 == 0)
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google_chromeec_set_usb_charge_mode(
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0, USB_CHARGE_MODE_DISABLED);
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if (gnvs->s5u1 == 0)
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google_chromeec_set_usb_charge_mode(
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1, USB_CHARGE_MODE_DISABLED);
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/* Enable wake events */
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google_chromeec_set_wake_mask(MAINBOARD_EC_S5_WAKE_EVENTS);
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break;
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