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arch/x86: remove .intel_syntax

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Replace with the more familiar AT&T syntax.
Tested by sha1sum(1)ing the object files, and checking the objdump that
the code in question was actually compiled.

Change-Id: Ie85b8ee5dad1794864c18683427e32f055745221
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13132
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2016-01-22 12:26:52 +01:00
committed by Patrick Georgi
parent c7b2b7c67d
commit 0302b060b6
3 changed files with 46 additions and 54 deletions
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51
src/arch/x86/boot.c
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@@ -60,43 +60,40 @@ static void jmp_payload(void *entry, unsigned long buffer, unsigned long size)
" push %1\n\t"
" push %0\n\t"
".intel_syntax noprefix\n\t"
/* use iret to switch to 32-bit code segment */
" xor rax,rax\n\t"
" mov ax, ss\n\t"
" push rax\n\t"
" mov rax, rsp\n\t"
" add rax, 8\n\t"
" push rax\n\t"
" xor %%rax,%%rax\n\t"
" mov %%ss, %%ax\n\t"
" push %%rax\n\t"
" mov %%rsp, %%rax\n\t"
" add $8, %%rax\n\t"
" push %%rax\n\t"
" pushfq\n\t"
" push 0x10\n\t"
" lea rax,[rip+3]\n\t"
" push rax\n\t"
" push $0x10\n\t"
" lea 3(%%rip), %%rax\n\t"
" push %%rax\n\t"
" iretq\n\t"
".code32\n\t"
/* disable paging */
" mov eax, cr0\n\t"
" btc eax, 31\n\t"
" mov cr0, eax\n\t"
" mov %%cr0, %%eax\n\t"
" btc $31, %%eax\n\t"
" mov %%eax, %%cr0\n\t"
/* disable long mode */
" mov ecx, 0xC0000080\n\t"
" mov $0xC0000080, %%ecx\n\t"
" rdmsr\n\t"
" btc eax, 8\n\t"
" btc $8, %%eax\n\t"
" wrmsr\n\t"
" pop eax\n\t"
" add esp, 4\n\t"
" pop ebx\n\t"
" add esp, 4\n\t"
" pop ecx\n\t"
" pop %%eax\n\t"
" add $4, %%esp\n\t"
" pop %%ebx\n\t"
" add $4, %%esp\n\t"
" pop %%ecx\n\t"
" add esp, 4\n\t"
" pop edx\n\t"
" add esp, 4\n\t"
" pop esi\n\t"
" add esp, 4\n\t"
".att_syntax prefix\n\t"
" add $4, %%esp\n\t"
" pop %%edx\n\t"
" add $4, %%esp\n\t"
" pop %%esi\n\t"
" add $4, %%esp\n\t"
#endif
/* Save the callee save registers... */