arch/x86: remove .intel_syntax

Replace with the more familiar AT&T syntax.
Tested by sha1sum(1)ing the object files, and checking the objdump that
the code in question was actually compiled.

Change-Id: Ie85b8ee5dad1794864c18683427e32f055745221
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Reviewed-on: https://review.coreboot.org/13132
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
2016-01-22 12:26:52 +01:00
committed by Patrick Georgi
parent c7b2b7c67d
commit 0302b060b6
3 changed files with 46 additions and 54 deletions

View File

@ -29,32 +29,30 @@
.globl __wakeup
__wakeup:
#ifdef __x86_64__
.intel_syntax noprefix
xor rax,rax
mov ax, ss
push rax
mov rax, rsp
add rax, 8
push rax
xor %rax,%rax
mov %ss, %ax
push %rax
mov %rsp, %rax
add $8, %rax
push %rax
pushfq
push 0x10
lea rax,[rip+3]
push rax
push $0x10
lea 3(%rip), %rax
push %rax
iretq
.code32
/* disable paging */
mov eax, cr0
btc eax, 31
mov cr0, eax
mov %cr0, %eax
btc $31, %eax
mov %eax, %cr0
/* disable long mode */
mov ecx, 0xC0000080
mov $0xC0000080, %ecx
rdmsr
btc eax, 8
btc $8, %eax
wrmsr
.att_syntax prefix
#endif
/* First prepare the jmp to the resume vector */
mov 0x4(%esp), %eax /* vector */