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acpi: Generate valid ACPI processor objects

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The existing code generated invalid ACPI processor objects
if the core number was greater than 9.  The first invalid
object instance was autocorrected by Linux, but subsequent
instances conflicted with each other, leading to a failure
to boot if more than 10 CPU cores were installed.

The modified code will function with up to 99 cores.

Change-Id: I62dc0eb61ae2e2b7f7dcf30e9c7de09cd901a81c
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/8422
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Timothy Pearson
2015-02-10 22:21:39 -06:00
committed by Alexandru Gagniuc
parent 4f731f2eab
commit 033bb4bc8d
44 changed files with 340 additions and 340 deletions
Download Patch File Download Diff File Expand all files Collapse all files

74
src/cpu/intel/fsp_model_206ax/acpi/cpu.asl
View File

@@ -20,31 +20,31 @@
*/
/* These devices are created at runtime */
External (\_PR.CPU0, DeviceObj)
External (\_PR.CPU1, DeviceObj)
External (\_PR.CPU2, DeviceObj)
External (\_PR.CPU3, DeviceObj)
External (\_PR.CPU4, DeviceObj)
External (\_PR.CPU5, DeviceObj)
External (\_PR.CPU6, DeviceObj)
External (\_PR.CPU7, DeviceObj)
External (\_PR.CP00, DeviceObj)
External (\_PR.CP01, DeviceObj)
External (\_PR.CP02, DeviceObj)
External (\_PR.CP03, DeviceObj)
External (\_PR.CP04, DeviceObj)
External (\_PR.CP05, DeviceObj)
External (\_PR.CP06, DeviceObj)
External (\_PR.CP07, DeviceObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
Method (PNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x81) // _CST
Notify (\_PR.CPU1, 0x81) // _CST
Notify (\_PR.CP00, 0x81) // _CST
Notify (\_PR.CP01, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x81) // _CST
Notify (\_PR.CPU3, 0x81) // _CST
Notify (\_PR.CP02, 0x81) // _CST
Notify (\_PR.CP03, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x81) // _CST
Notify (\_PR.CPU5, 0x81) // _CST
Notify (\_PR.CPU6, 0x81) // _CST
Notify (\_PR.CPU7, 0x81) // _CST
Notify (\_PR.CP04, 0x81) // _CST
Notify (\_PR.CP05, 0x81) // _CST
Notify (\_PR.CP06, 0x81) // _CST
Notify (\_PR.CP07, 0x81) // _CST
}
}
@@ -52,18 +52,18 @@ Method (PNOT)
Method (PPCN)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x80) // _PPC
Notify (\_PR.CPU1, 0x80) // _PPC
Notify (\_PR.CP00, 0x80) // _PPC
Notify (\_PR.CP01, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x80) // _PPC
Notify (\_PR.CPU3, 0x80) // _PPC
Notify (\_PR.CP02, 0x80) // _PPC
Notify (\_PR.CP03, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x80) // _PPC
Notify (\_PR.CPU5, 0x80) // _PPC
Notify (\_PR.CPU6, 0x80) // _PPC
Notify (\_PR.CPU7, 0x80) // _PPC
Notify (\_PR.CP04, 0x80) // _PPC
Notify (\_PR.CP05, 0x80) // _PPC
Notify (\_PR.CP06, 0x80) // _PPC
Notify (\_PR.CP07, 0x80) // _PPC
}
}
@@ -71,18 +71,18 @@ Method (PPCN)
Method (TNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x82) // _TPC
Notify (\_PR.CPU1, 0x82) // _TPC
Notify (\_PR.CP00, 0x82) // _TPC
Notify (\_PR.CP01, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x82) // _TPC
Notify (\_PR.CPU3, 0x82) // _TPC
Notify (\_PR.CP02, 0x82) // _TPC
Notify (\_PR.CP03, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x82) // _TPC
Notify (\_PR.CPU5, 0x82) // _TPC
Notify (\_PR.CPU6, 0x82) // _TPC
Notify (\_PR.CPU7, 0x82) // _TPC
Notify (\_PR.CP04, 0x82) // _TPC
Notify (\_PR.CP05, 0x82) // _TPC
Notify (\_PR.CP06, 0x82) // _TPC
Notify (\_PR.CP07, 0x82) // _TPC
}
}
@@ -90,13 +90,13 @@ Method (TNOT)
Method (PPKG)
{
If (LGreaterEqual (\PCNT, 8)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3,
\_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07})
} ElseIf (LGreaterEqual (\PCNT, 4)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1})
Return (Package() {\_PR.CP00, \_PR.CP01})
} Else {
Return (Package() {\_PR.CPU0})
Return (Package() {\_PR.CP00})
}
}

74
src/cpu/intel/fsp_model_406dx/acpi/cpu.asl
View File

@@ -20,31 +20,31 @@
*/
/* These devices are created at runtime */
External (\_PR.CPU0, DeviceObj)
External (\_PR.CPU1, DeviceObj)
External (\_PR.CPU2, DeviceObj)
External (\_PR.CPU3, DeviceObj)
External (\_PR.CPU4, DeviceObj)
External (\_PR.CPU5, DeviceObj)
External (\_PR.CPU6, DeviceObj)
External (\_PR.CPU7, DeviceObj)
External (\_PR.CP00, DeviceObj)
External (\_PR.CP01, DeviceObj)
External (\_PR.CP02, DeviceObj)
External (\_PR.CP03, DeviceObj)
External (\_PR.CP04, DeviceObj)
External (\_PR.CP05, DeviceObj)
External (\_PR.CP06, DeviceObj)
External (\_PR.CP07, DeviceObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
Method (PNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x81) // _CST
Notify (\_PR.CPU1, 0x81) // _CST
Notify (\_PR.CP00, 0x81) // _CST
Notify (\_PR.CP01, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x81) // _CST
Notify (\_PR.CPU3, 0x81) // _CST
Notify (\_PR.CP02, 0x81) // _CST
Notify (\_PR.CP03, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x81) // _CST
Notify (\_PR.CPU5, 0x81) // _CST
Notify (\_PR.CPU6, 0x81) // _CST
Notify (\_PR.CPU7, 0x81) // _CST
Notify (\_PR.CP04, 0x81) // _CST
Notify (\_PR.CP05, 0x81) // _CST
Notify (\_PR.CP06, 0x81) // _CST
Notify (\_PR.CP07, 0x81) // _CST
}
}
@@ -52,18 +52,18 @@ Method (PNOT)
Method (PPCN)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x80) // _PPC
Notify (\_PR.CPU1, 0x80) // _PPC
Notify (\_PR.CP00, 0x80) // _PPC
Notify (\_PR.CP01, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x80) // _PPC
Notify (\_PR.CPU3, 0x80) // _PPC
Notify (\_PR.CP02, 0x80) // _PPC
Notify (\_PR.CP03, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x80) // _PPC
Notify (\_PR.CPU5, 0x80) // _PPC
Notify (\_PR.CPU6, 0x80) // _PPC
Notify (\_PR.CPU7, 0x80) // _PPC
Notify (\_PR.CP04, 0x80) // _PPC
Notify (\_PR.CP05, 0x80) // _PPC
Notify (\_PR.CP06, 0x80) // _PPC
Notify (\_PR.CP07, 0x80) // _PPC
}
}
@@ -71,18 +71,18 @@ Method (PPCN)
Method (TNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x82) // _TPC
Notify (\_PR.CPU1, 0x82) // _TPC
Notify (\_PR.CP00, 0x82) // _TPC
Notify (\_PR.CP01, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x82) // _TPC
Notify (\_PR.CPU3, 0x82) // _TPC
Notify (\_PR.CP02, 0x82) // _TPC
Notify (\_PR.CP03, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x82) // _TPC
Notify (\_PR.CPU5, 0x82) // _TPC
Notify (\_PR.CPU6, 0x82) // _TPC
Notify (\_PR.CPU7, 0x82) // _TPC
Notify (\_PR.CP04, 0x82) // _TPC
Notify (\_PR.CP05, 0x82) // _TPC
Notify (\_PR.CP06, 0x82) // _TPC
Notify (\_PR.CP07, 0x82) // _TPC
}
}
@@ -90,13 +90,13 @@ Method (TNOT)
Method (PPKG)
{
If (LGreaterEqual (\PCNT, 8)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3,
\_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07})
} ElseIf (LGreaterEqual (\PCNT, 4)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1})
Return (Package() {\_PR.CP00, \_PR.CP01})
} Else {
Return (Package() {\_PR.CPU0})
Return (Package() {\_PR.CP00})
}
}

74
src/cpu/intel/haswell/acpi/cpu.asl
View File

@@ -20,31 +20,31 @@
*/
/* These devices are created at runtime */
External (\_PR.CPU0, DeviceObj)
External (\_PR.CPU1, DeviceObj)
External (\_PR.CPU2, DeviceObj)
External (\_PR.CPU3, DeviceObj)
External (\_PR.CPU4, DeviceObj)
External (\_PR.CPU5, DeviceObj)
External (\_PR.CPU6, DeviceObj)
External (\_PR.CPU7, DeviceObj)
External (\_PR.CP00, DeviceObj)
External (\_PR.CP01, DeviceObj)
External (\_PR.CP02, DeviceObj)
External (\_PR.CP03, DeviceObj)
External (\_PR.CP04, DeviceObj)
External (\_PR.CP05, DeviceObj)
External (\_PR.CP06, DeviceObj)
External (\_PR.CP07, DeviceObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
Method (PNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x81) // _CST
Notify (\_PR.CPU1, 0x81) // _CST
Notify (\_PR.CP00, 0x81) // _CST
Notify (\_PR.CP01, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x81) // _CST
Notify (\_PR.CPU3, 0x81) // _CST
Notify (\_PR.CP02, 0x81) // _CST
Notify (\_PR.CP03, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x81) // _CST
Notify (\_PR.CPU5, 0x81) // _CST
Notify (\_PR.CPU6, 0x81) // _CST
Notify (\_PR.CPU7, 0x81) // _CST
Notify (\_PR.CP04, 0x81) // _CST
Notify (\_PR.CP05, 0x81) // _CST
Notify (\_PR.CP06, 0x81) // _CST
Notify (\_PR.CP07, 0x81) // _CST
}
}
@@ -52,18 +52,18 @@ Method (PNOT)
Method (PPCN)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x80) // _PPC
Notify (\_PR.CPU1, 0x80) // _PPC
Notify (\_PR.CP00, 0x80) // _PPC
Notify (\_PR.CP01, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x80) // _PPC
Notify (\_PR.CPU3, 0x80) // _PPC
Notify (\_PR.CP02, 0x80) // _PPC
Notify (\_PR.CP03, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x80) // _PPC
Notify (\_PR.CPU5, 0x80) // _PPC
Notify (\_PR.CPU6, 0x80) // _PPC
Notify (\_PR.CPU7, 0x80) // _PPC
Notify (\_PR.CP04, 0x80) // _PPC
Notify (\_PR.CP05, 0x80) // _PPC
Notify (\_PR.CP06, 0x80) // _PPC
Notify (\_PR.CP07, 0x80) // _PPC
}
}
@@ -71,18 +71,18 @@ Method (PPCN)
Method (TNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x82) // _TPC
Notify (\_PR.CPU1, 0x82) // _TPC
Notify (\_PR.CP00, 0x82) // _TPC
Notify (\_PR.CP01, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x82) // _TPC
Notify (\_PR.CPU3, 0x82) // _TPC
Notify (\_PR.CP02, 0x82) // _TPC
Notify (\_PR.CP03, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x82) // _TPC
Notify (\_PR.CPU5, 0x82) // _TPC
Notify (\_PR.CPU6, 0x82) // _TPC
Notify (\_PR.CPU7, 0x82) // _TPC
Notify (\_PR.CP04, 0x82) // _TPC
Notify (\_PR.CP05, 0x82) // _TPC
Notify (\_PR.CP06, 0x82) // _TPC
Notify (\_PR.CP07, 0x82) // _TPC
}
}
@@ -90,13 +90,13 @@ Method (TNOT)
Method (PPKG)
{
If (LGreaterEqual (\PCNT, 8)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3,
\_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07})
} ElseIf (LGreaterEqual (\PCNT, 4)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1})
Return (Package() {\_PR.CP00, \_PR.CP01})
} Else {
Return (Package() {\_PR.CPU0})
Return (Package() {\_PR.CP00})
}
}

74
src/cpu/intel/model_206ax/acpi/cpu.asl
View File

@@ -20,31 +20,31 @@
*/
/* These devices are created at runtime */
External (\_PR.CPU0, DeviceObj)
External (\_PR.CPU1, DeviceObj)
External (\_PR.CPU2, DeviceObj)
External (\_PR.CPU3, DeviceObj)
External (\_PR.CPU4, DeviceObj)
External (\_PR.CPU5, DeviceObj)
External (\_PR.CPU6, DeviceObj)
External (\_PR.CPU7, DeviceObj)
External (\_PR.CP00, DeviceObj)
External (\_PR.CP01, DeviceObj)
External (\_PR.CP02, DeviceObj)
External (\_PR.CP03, DeviceObj)
External (\_PR.CP04, DeviceObj)
External (\_PR.CP05, DeviceObj)
External (\_PR.CP06, DeviceObj)
External (\_PR.CP07, DeviceObj)
/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
Method (PNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x81) // _CST
Notify (\_PR.CPU1, 0x81) // _CST
Notify (\_PR.CP00, 0x81) // _CST
Notify (\_PR.CP01, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x81) // _CST
Notify (\_PR.CPU3, 0x81) // _CST
Notify (\_PR.CP02, 0x81) // _CST
Notify (\_PR.CP03, 0x81) // _CST
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x81) // _CST
Notify (\_PR.CPU5, 0x81) // _CST
Notify (\_PR.CPU6, 0x81) // _CST
Notify (\_PR.CPU7, 0x81) // _CST
Notify (\_PR.CP04, 0x81) // _CST
Notify (\_PR.CP05, 0x81) // _CST
Notify (\_PR.CP06, 0x81) // _CST
Notify (\_PR.CP07, 0x81) // _CST
}
}
@@ -52,18 +52,18 @@ Method (PNOT)
Method (PPCN)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x80) // _PPC
Notify (\_PR.CPU1, 0x80) // _PPC
Notify (\_PR.CP00, 0x80) // _PPC
Notify (\_PR.CP01, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x80) // _PPC
Notify (\_PR.CPU3, 0x80) // _PPC
Notify (\_PR.CP02, 0x80) // _PPC
Notify (\_PR.CP03, 0x80) // _PPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x80) // _PPC
Notify (\_PR.CPU5, 0x80) // _PPC
Notify (\_PR.CPU6, 0x80) // _PPC
Notify (\_PR.CPU7, 0x80) // _PPC
Notify (\_PR.CP04, 0x80) // _PPC
Notify (\_PR.CP05, 0x80) // _PPC
Notify (\_PR.CP06, 0x80) // _PPC
Notify (\_PR.CP07, 0x80) // _PPC
}
}
@@ -71,18 +71,18 @@ Method (PPCN)
Method (TNOT)
{
If (LGreaterEqual (\PCNT, 2)) {
Notify (\_PR.CPU0, 0x82) // _TPC
Notify (\_PR.CPU1, 0x82) // _TPC
Notify (\_PR.CP00, 0x82) // _TPC
Notify (\_PR.CP01, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 4)) {
Notify (\_PR.CPU2, 0x82) // _TPC
Notify (\_PR.CPU3, 0x82) // _TPC
Notify (\_PR.CP02, 0x82) // _TPC
Notify (\_PR.CP03, 0x82) // _TPC
}
If (LGreaterEqual (\PCNT, 8)) {
Notify (\_PR.CPU4, 0x82) // _TPC
Notify (\_PR.CPU5, 0x82) // _TPC
Notify (\_PR.CPU6, 0x82) // _TPC
Notify (\_PR.CPU7, 0x82) // _TPC
Notify (\_PR.CP04, 0x82) // _TPC
Notify (\_PR.CP05, 0x82) // _TPC
Notify (\_PR.CP06, 0x82) // _TPC
Notify (\_PR.CP07, 0x82) // _TPC
}
}
@@ -90,13 +90,13 @@ Method (TNOT)
Method (PPKG)
{
If (LGreaterEqual (\PCNT, 8)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3,
\_PR.CPU4, \_PR.CPU5, \_PR.CPU6, \_PR.CPU7})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07})
} ElseIf (LGreaterEqual (\PCNT, 4)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1, \_PR.CPU2, \_PR.CPU3})
Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
} ElseIf (LGreaterEqual (\PCNT, 2)) {
Return (Package() {\_PR.CPU0, \_PR.CPU1})
Return (Package() {\_PR.CP00, \_PR.CP01})
} Else {
Return (Package() {\_PR.CPU0})
Return (Package() {\_PR.CP00})
}
}

20
src/cpu/intel/model_6dx/acpi/cpu.asl
View File

@@ -4,34 +4,34 @@ External(PDC1)
// Power notification
External (\_PR_.CPU0, DeviceObj)
External (\_PR_.CPU1, DeviceObj)
External (\_PR_.CPU0._PPC)
External (\_PR_.CPU1._PPC)
External (\_PR_.CP00, DeviceObj)
External (\_PR_.CP01, DeviceObj)
External (\_PR_.CP00._PPC)
External (\_PR_.CP01._PPC)
Method (PNOT)
{
If (MPEN) {
If(And(PDC0, 0x08)) {
Notify (\_PR_.CPU0, 0x80) // _PPC
Notify (\_PR_.CP00, 0x80) // _PPC
If (And(PDC0, 0x10)) {
Sleep(100)
Notify(\_PR_.CPU0, 0x81) // _CST
Notify(\_PR_.CP00, 0x81) // _CST
}
}
If(And(PDC1, 0x08)) {
Notify (\_PR_.CPU1, 0x80) // _PPC
Notify (\_PR_.CP01, 0x80) // _PPC
If (And(PDC1, 0x10)) {
Sleep(100)
Notify(\_PR_.CPU1, 0x81) // _CST
Notify(\_PR_.CP01, 0x81) // _CST
}
}
} Else { // UP
Notify (\_PR_.CPU0, 0x80)
Notify (\_PR_.CP00, 0x80)
Sleep(0x64)
Notify(\_PR_.CPU0, 0x81)
Notify(\_PR_.CP00, 0x81)
}
}