mb/google/brya/var/dochi: Update overridetree for FingerPrint

Update overridetree to correct FP_MCU fw_config settings.

BUG=b:299284564, b:298328847, b:299570339
TEST=emerge-brya coreboot

Change-Id: If76dd8fa3567ed01b11a6d2ba796e8c39807816c
Signed-off-by: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78454
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Bob Moragues <moragues@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Morris Hsu
2023-10-18 15:45:18 +08:00
committed by Felix Held
parent a0efce412d
commit 0360aea500
3 changed files with 11 additions and 12 deletions

View File

@@ -1,9 +1,9 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <bootstate.h> #include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <console/console.h> #include <console/console.h>
#include <fw_config.h> #include <fw_config.h>
#include <gpio.h>
static const struct pad_config fp_disable_pads[] = { static const struct pad_config fp_disable_pads[] = {
PAD_NC(GPP_D0, NONE), /* D0 : ISH_GP0 ==> PCH_FP_BOOT0 */ PAD_NC(GPP_D0, NONE), /* D0 : ISH_GP0 ==> PCH_FP_BOOT0 */
@@ -11,11 +11,10 @@ static const struct pad_config fp_disable_pads[] = {
PAD_NC(GPP_D2, NONE), /* D2 : ISH_GP2 ==> EN_FP_PWR */ PAD_NC(GPP_D2, NONE), /* D2 : ISH_GP2 ==> EN_FP_PWR */
}; };
static void fw_config_handle(void *unused) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{ {
if (fw_config_probe(FW_CONFIG(FPMCU_MASK, FPMCU_DISABLED))) { if (fw_config_probe(FW_CONFIG(FP_MCU, FP_ABSENT))) {
printk(BIOS_INFO, "Disabling FP pads\n"); printk(BIOS_INFO, "Configure GPIOs for no FP module.\n");
gpio_configure_pads(fp_disable_pads, ARRAY_SIZE(fp_disable_pads)); gpio_padbased_override(padbased_table, fp_disable_pads, ARRAY_SIZE(fp_disable_pads));
} }
} }
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL);

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@@ -1,7 +1,7 @@
fw_config fw_config
field FPMCU_MASK 10 field FP_MCU 9 10
option FPMCU_DISABLED 0 option FP_ABSENT 0
option FPMCU_ENABLED 1 option FP_MCU_NUVOTON 1
end end
field STORAGE 30 31 field STORAGE 30 31
option STORAGE_UNKNOWN 0 option STORAGE_UNKNOWN 0
@@ -279,7 +279,7 @@ chip soc/intel/alderlake
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)" register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
register "enable_delay_ms" = "3" register "enable_delay_ms" = "3"
device spi 0 on device spi 0 on
probe FPMCU_MASK FPMCU_ENABLED probe FP_MCU FP_MCU_NUVOTON
end end
end # FPMCU end # FPMCU
end end

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@@ -6,6 +6,6 @@
void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config) void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
{ {
if (fw_config_probe(FW_CONFIG(FPMCU_MASK, FPMCU_DISABLED))) if (fw_config_probe(FW_CONFIG(FP_MCU, FP_ABSENT)))
config->serial_io_gspi_mode[PchSerialIoIndexGSPI1] = PchSerialIoDisabled; config->serial_io_gspi_mode[PchSerialIoIndexGSPI1] = PchSerialIoDisabled;
} }