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soc/amd/common/block/smu: rename mailbox register defines

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Since we have the SMN access block now, rename the SMU mailbox interface
registers to clarify that those are in the SMN register space.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic5b7093f99eabd3c29610072b186ed156f335bd8
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51400
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held
2021-03-10 23:29:11 +01:00
parent e995684fa1
commit 03a4bfc54d
4 changed files with 14 additions and 20 deletions
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11
src/soc/amd/picasso/include/soc/smu.h
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@@ -3,13 +3,10 @@
#ifndef AMD_PICASSO_SMU_H
#define AMD_PICASSO_SMU_H
/*
* SMU mailbox register offsets in indirect address space accessed by an index/data pair in
* D0F00 config space.
*/
#define REG_ADDR_MESG_ID 0x3b10528
#define REG_ADDR_MESG_RESP 0x3b10564
#define REG_ADDR_MESG_ARGS_BASE 0x3b10998
/* SMU mailbox register offsets in SMN */
#define SMN_SMU_MESG_ID 0x3b10528
#define SMN_SMU_MESG_RESP 0x3b10564
#define SMN_SMU_MESG_ARGS_BASE 0x3b10998
#define SMU_NUM_ARGS 6