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baytrail: Fix some minor errors in FSP

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- Duplicate declaration of GetFspReservedMemoryFromGuid
- Corrupt line that was only compiled for a southbridge that no
  board in coreboot currently uses.

(thanks for Mike Hibbett <mhibbett@ircona.com> for pointing this out)

Change-Id: I847e807272acbaa93c87a89c0d2f94829c9121e6
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: http://review.coreboot.org/5798
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
This commit is contained in:
David Hendricks 2014-05-20 15:52:08 -07:00
parent 61113de923
commit 03b00e9675
2 changed files with 2 additions and 9 deletions
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2
src/northbridge/intel/fsp_sandybridge/fsp/chipset_fsp_util.c
View File

@ -89,7 +89,7 @@ void chipset_fsp_early_init(FSP_INIT_PARAMS *FspInitParams,
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX) #if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_FSP_I89XX)
/* Initialize the UPD Data */ /* Initialize the UPD Data */
GetUpdDefaultFromFsp (fsp_ptr, fsp_upd_data);/home/martin/extra/git/coreboot GetUpdDefaultFromFsp (fsp_ptr, fsp_upd_data);
ConfigureDefaultUpdData(fsp_upd_data); ConfigureDefaultUpdData(fsp_upd_data);
#else #else
pFspRtBuffer->Platform.MemoryConfig = &MemoryConfig; pFspRtBuffer->Platform.MemoryConfig = &MemoryConfig;

7
src/vendorcode/intel/fsp/baytrail/include/fspplatform.h
View File

@ -75,11 +75,4 @@ GetLowMemorySize (
uint32_t *LowMemoryLength uint32_t *LowMemoryLength
); );
void
GetFspReservedMemoryFromGuid (
uint32_t *FspMemoryBase,
uint32_t *FspMemoryLength,
EFI_GUID FspReservedMemoryGuid
);
#endif #endif