google/jecht: add new mainboard
Taken from CrOS, including everything up to commit da4c33913. Adapted to upstream. Change-Id: I095e6726a220200ba17719fc05fcdc521da484e8 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/10432 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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Patrick Georgi
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Patrick Georgi
Patrick Georgi
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aa04e18409
commit
04746fc22c
169
src/mainboard/google/jecht/mainboard.c
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169
src/mainboard/google/jecht/mainboard.c
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2007-2009 coresystems GmbH
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* Copyright (C) 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc.
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*/
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#include <types.h>
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#include <string.h>
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#include <smbios.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <device/pci_def.h>
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#include <device/pci_ops.h>
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#include <console/console.h>
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#if CONFIG_VGA_ROM_RUN
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#include <x86emu/x86emu.h>
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#endif
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#include <pc80/mc146818rtc.h>
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#include <arch/acpi.h>
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#include <arch/io.h>
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#include <arch/interrupt.h>
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#include <boot/coreboot_tables.h>
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#include "hda_verb.h"
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#include "onboard.h"
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void mainboard_suspend_resume(void)
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{
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/* Call SMM finalize() handlers before resume */
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outb(0xcb, 0xb2);
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}
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#if CONFIG_VGA_ROM_RUN
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static int int15_handler(void)
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{
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int res = 0;
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printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n",
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__func__, X86_AX, X86_BX, X86_CX, X86_DX);
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switch (X86_AX) {
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case 0x5f34:
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/*
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* Set Panel Fitting Hook:
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* bit 2 = Graphics Stretching
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* bit 1 = Text Stretching
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* bit 0 = Centering (do not set with bit1 or bit2)
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* 0 = video bios default
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*/
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X86_AX = 0x005f;
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X86_CX = 0x0001;
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res = 1;
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break;
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case 0x5f35:
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/*
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* Boot Display Device Hook:
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* bit 0 = CRT
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* bit 1 = TV (eDP) *
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* bit 2 = EFP *
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* bit 3 = LFP
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* bit 4 = CRT2
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* bit 5 = TV2 (eDP) *
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* bit 6 = EFP2 *
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* bit 7 = LFP2
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*/
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X86_AX = 0x005f;
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X86_CX = 0x0000;
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res = 1;
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break;
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case 0x5f51:
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/*
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* Hook to select active LFP configuration:
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* 00h = No LVDS, VBIOS does not enable LVDS
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* 01h = Int-LVDS, LFP driven by integrated LVDS decoder
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* 02h = SVDO-LVDS, LFP driven by SVDO decoder
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* 03h = eDP, LFP Driven by Int-DisplayPort encoder
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*/
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X86_AX = 0x005f;
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X86_CX = 0x0003;
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res = 1;
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break;
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case 0x5f70:
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switch ((X86_CX >> 8) & 0xff) {
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case 0:
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/* Get Mux */
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X86_AX = 0x005f;
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X86_CX = 0x0000;
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res = 1;
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break;
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case 1:
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/* Set Mux */
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X86_AX = 0x005f;
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X86_CX = 0x0000;
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res = 1;
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break;
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case 2:
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/* Get SG/Non-SG mode */
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X86_AX = 0x005f;
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X86_CX = 0x0000;
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res = 1;
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break;
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default:
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/* Interrupt was not handled */
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printk(BIOS_DEBUG,
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"Unknown INT15 5f70 function: 0x%02x\n",
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((X86_CX >> 8) & 0xff));
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break;
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}
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break;
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default:
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printk(BIOS_DEBUG, "Unknown INT15 function %04x!\n", X86_AX);
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break;
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}
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return res;
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}
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#endif
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/* Audio Setup */
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extern const u32 *cim_verb_data;
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extern u32 cim_verb_data_size;
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extern const u32 *pc_beep_verbs;
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extern u32 pc_beep_verbs_size;
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static void verb_setup(void)
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{
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cim_verb_data = mainboard_cim_verb_data;
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cim_verb_data_size = sizeof(mainboard_cim_verb_data);
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pc_beep_verbs = mainboard_pc_beep_verbs;
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pc_beep_verbs_size = mainboard_pc_beep_verbs_size;
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}
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static void mainboard_init(device_t dev)
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{
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lan_init();
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}
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// mainboard_enable is executed as first thing after
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// enumerate_buses().
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static void mainboard_enable(device_t dev)
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{
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dev->ops->init = mainboard_init;
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#if CONFIG_VGA_ROM_RUN
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/* Install custom int15 handler for VGA OPROM */
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mainboard_interrupt_handlers(0x15, &int15_handler);
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#endif
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verb_setup();
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}
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struct chip_operations mainboard_ops = {
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.enable_dev = mainboard_enable,
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};
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