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sb,soc/intel: Set IOAPIC redirection entry count

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The number of redirection table entries (aka interrupt vectors) inside
an I/O APIC may depend of the SKU, with the related register being of
type read/write-once. Provide support utilities to either lock or set
this registers value.

Change-Id: I8da869ba390dd821b43032e4ccbc9291c39e6bab
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55289
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki
2021-06-06 08:04:28 +03:00
committed by Felix Held
parent e8601f4777
commit 04a40379b0
10 changed files with 61 additions and 73 deletions
Download Patch File Download Diff File Expand all files Collapse all files

5
src/arch/x86/include/arch/ioapic.h
View File

@@ -31,6 +31,11 @@ void io_apic_write(void *ioapic_base, u32 reg, u32 value);
void set_ioapic_id(void *ioapic_base, u8 ioapic_id);
u8 get_ioapic_id(void *ioapic_base);
u8 get_ioapic_version(void *ioapic_base);
unsigned int ioapic_get_max_vectors(void *ioapic_base);
void ioapic_set_max_vectors(void *ioapic_base, int mre_count);
void ioapic_lock_max_vectors(void *ioapic_base);
void setup_ioapic(void *ioapic_base, u8 ioapic_id);
void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb);

48
src/arch/x86/ioapic.c
View File

@@ -27,18 +27,44 @@ static void write_vector(void *ioapic_base, u8 vector, u32 high, u32 low)
vector, high, low);
}
static int ioapic_interrupt_count(void *ioapic_base)
/* Bits 23-16 of register 0x01 specify the maximum redirection entry, which
* is the number of interrupts minus 1. */
unsigned int ioapic_get_max_vectors(void *ioapic_base)
{
/* Read the available number of interrupts. */
int ioapic_interrupts = (io_apic_read(ioapic_base, 0x01) >> 16) & 0xff;
if (!ioapic_interrupts || ioapic_interrupts == 0xff)
ioapic_interrupts = 23;
ioapic_interrupts += 1; /* Bits 23-16 specify the maximum redirection
entry, which is the number of interrupts
minus 1. */
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", ioapic_interrupts);
u32 reg;
u8 count;
return ioapic_interrupts;
reg = io_apic_read(ioapic_base, 0x01);
count = reg >> 16;
if (!count || count == 0xff)
count = 23;
count++;
printk(BIOS_DEBUG, "IOAPIC: %d interrupts\n", count);
return count;
}
/* Set maximum number of redirection entries (MRE). It is write-once register
* for some chipsets, and a negative mre_count will lock it to the number
* of vectors read from the register. */
void ioapic_set_max_vectors(void *ioapic_base, int mre_count)
{
u32 reg;
u8 count;
reg = io_apic_read(ioapic_base, 0x01);
count = reg >> 16;
if (mre_count > 0)
count = mre_count - 1;
reg &= ~(0xff << 16);
reg |= count << 16;
io_apic_write(ioapic_base, 0x01, count);
}
void ioapic_lock_max_vectors(void *ioapic_base)
{
ioapic_set_max_vectors(ioapic_base, -1);
}
static void clear_vectors(void *ioapic_base, u8 first, u8 last)
@@ -134,6 +160,6 @@ void ioapic_set_boot_config(void *ioapic_base, bool irq_on_fsb)
void setup_ioapic(void *ioapic_base, u8 ioapic_id)
{
set_ioapic_id(ioapic_base, ioapic_id);
clear_vectors(ioapic_base, 0, ioapic_interrupt_count(ioapic_base) - 1);
clear_vectors(ioapic_base, 0, ioapic_get_max_vectors(ioapic_base) - 1);
route_i8259_irq0(ioapic_base);
}