Redo testbios utility to use all of YABEL

Drop buggy duplicate implementation of intXX handlers
and provide enough glue to use all of YABEL.

Change-Id: I2db77a56a2a991cb84876456dcbb3a843a0d9754
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/12117
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Stefan Reinauer
2015-10-21 13:00:41 -07:00
committed by Stefan Reinauer
parent eb960f1af9
commit 05082737a9
20 changed files with 906 additions and 1656 deletions

View File

@@ -1,62 +1,35 @@
/*
* This file is part of the coreboot project.
*
* Copyright (C) 2016 Google Inc
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __PCI_USERSPACE_H__
#define __PCI_USERSPACE_H__
#include <pci/pci.h>
typedef unsigned long pciaddr_t;
typedef u8 byte;
typedef u16 word;
#if 0
struct pci_dev {
struct pci_dev *next; /* Next device in the chain */
word bus; /* Higher byte can select host bridges */
byte dev, func; /* Device and function */
/* These fields are set by pci_fill_info() */
int known_fields; /* Set of info fields already known */
word vendor_id, device_id; /* Identity of the device */
int irq; /* IRQ number */
pciaddr_t base_addr[6]; /* Base addresses */
pciaddr_t size[6]; /* Region sizes */
pciaddr_t rom_base_addr; /* Expansion ROM base address */
pciaddr_t rom_size; /* Expansion ROM size */
/* Fields used internally: */
void *access;
void *methods;
byte *cache; /* Cached information */
int cache_len;
int hdrtype; /* Direct methods: header type */
void *aux; /* Auxillary data */
struct device {
int busno;
int slot;
int func;
};
int pci_initialize(void);
int pci_exit(void);
struct pci_filter {
int bus, slot, func; /* -1 = ANY */
int vendor, device;
};
#endif
#define PCITAG struct pci_filter *
#define pciVideoPtr struct pci_dev *
extern int pciNumBuses;
int pciInit(void);
int pciExit(void);
PCITAG findPci(unsigned short bx);
//u32 pciSlotBX(pciVideoPtr pvp);
u32 pciSlotBX(PCITAG tag);
void pciWriteLong(PCITAG tag, u32 idx, u32 data);
void pciWriteWord(PCITAG tag, u32 idx, u16 data);
void pciWriteByte(PCITAG tag, u32 idx, u8 data);
u32 pciReadLong(PCITAG tag, u32 idx);
u16 pciReadWord(PCITAG tag, u32 idx);
u8 pciReadByte(PCITAG tag, u32 idx);
u8 pci_read_config8(struct device *dev, unsigned int where);
u16 pci_read_config16(struct device *dev, unsigned int where);
u32 pci_read_config32(struct device *dev, unsigned int where);
void pci_write_config8(struct device *dev, unsigned int where, u8 val);
void pci_write_config16(struct device *dev, unsigned int where, u16 val);
void pci_write_config32(struct device *dev, unsigned int where, u32 val);
#endif