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mb/google/nissa: Simplify LTE GPIO config using pad-based overrides

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Currently, to enable/disable LTE based on fw_config on nissa, we have
two sets of GPIOs: lte_enable_pads and lte_disable_pads. This was to
prevent the SAR interrupt pin GPP_H19 from floating for the short period
of time between enabling it in gpio.c and disabling it in fw_config.c
(see CB:64270 for more details).

With the new pad-based GPIO overrides (CB:64712), this is no longer an
issue since the gpio.c and fw_config.c overrides are applied at the same
time. So simplify the LTE GPIO configuration by enabling all the LTE
pins in the variant gpio.c, then disabling them in fw_config.c if
needed.

BUG=b:231690996
TEST=LTE still works on nivviks

Change-Id: I5bf20a027414ea5e7c1f198d69e355c76f467244
Signed-off-by: Reka Norman <rekanorman@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/66776
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Reka Norman
2022-08-16 10:48:51 +10:00
committed by Tim Wawrzynczak
parent 9c63fd5ad2
commit 054620dcdc
6 changed files with 58 additions and 44 deletions
Download Patch File Download Diff File Expand all files Collapse all files

22
src/mainboard/google/brya/variants/craask/fw_config.c
View File

@@ -2,24 +2,20 @@
#include <baseboard/gpio.h> #include <baseboard/gpio.h>
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <bootstate.h>
#include <console/console.h> #include <console/console.h>
#include <fw_config.h> #include <fw_config.h>
static const struct pad_config lte_enable_pads[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
};
static const struct pad_config lte_disable_pads[] = { static const struct pad_config lte_disable_pads[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_NC(GPP_A8, NONE),
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_NC(GPP_D6, NONE), PAD_NC(GPP_D6, NONE),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_NC(GPP_H19, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_NC(GPP_H23, NONE),
}; };
static const struct pad_config wfc_disable_pads[] = { static const struct pad_config wfc_disable_pads[] = {
@@ -48,11 +44,7 @@ static const struct pad_config sd_disable_pads[] = {
void fw_config_gpio_padbased_override(struct pad_config *padbased_table) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{ {
if (fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
printk(BIOS_INFO, "Enable LTE-related GPIO pins.\n");
gpio_padbased_override(padbased_table, lte_enable_pads,
ARRAY_SIZE(lte_enable_pads));
} else {
printk(BIOS_INFO, "Disable LTE-related GPIO pins on craask.\n"); printk(BIOS_INFO, "Disable LTE-related GPIO pins on craask.\n");
gpio_padbased_override(padbased_table, lte_disable_pads, gpio_padbased_override(padbased_table, lte_disable_pads,
ARRAY_SIZE(lte_disable_pads)); ARRAY_SIZE(lte_disable_pads));

6
src/mainboard/google/brya/variants/craask/gpio.c
View File

@@ -7,6 +7,8 @@
/* Pad configuration in ramstage for craask */ /* Pad configuration in ramstage for craask */
static const struct pad_config override_gpio_table[] = { static const struct pad_config override_gpio_table[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_CFG_GPO(GPP_D6, 1, DEEP), PAD_CFG_GPO(GPP_D6, 1, DEEP),
/* D7 : WLAN_CLKREQ_ODL */ /* D7 : WLAN_CLKREQ_ODL */
@@ -15,6 +17,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
/* H3 : WLAN_PCIE_WAKE_ODL */ /* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
}; };
/* Early pad configuration in bootblock */ /* Early pad configuration in bootblock */

28
src/mainboard/google/brya/variants/nivviks/fw_config.c
View File

@@ -3,31 +3,33 @@
#include <baseboard/gpio.h> #include <baseboard/gpio.h>
#include <baseboard/variants.h> #include <baseboard/variants.h>
#include <boardid.h> #include <boardid.h>
#include <bootstate.h>
#include <console/console.h> #include <console/console.h>
#include <fw_config.h> #include <fw_config.h>
static const struct pad_config lte_enable_pads[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
};
static const struct pad_config lte_disable_pads_nivviks[] = { static const struct pad_config lte_disable_pads_nivviks[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_NC(GPP_A8, NONE),
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_NC(GPP_D6, NONE), PAD_NC(GPP_D6, NONE),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_NC(GPP_H19, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_NC(GPP_H23, NONE),
}; };
static const struct pad_config lte_disable_pads_nirwen[] = { static const struct pad_config lte_disable_pads_nirwen[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_NC(GPP_A8, NONE),
/* E13 : WWAN_EN */ /* E13 : WWAN_EN */
PAD_NC_LOCK(GPP_E13, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_E13, NONE, LOCK_CONFIG),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_NC(GPP_H19, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_NC(GPP_H23, NONE),
}; };
static const struct pad_config sd_disable_pads[] = { static const struct pad_config sd_disable_pads[] = {
@@ -94,11 +96,7 @@ static const struct pad_config nvme_disable_pads[] = {
void fw_config_gpio_padbased_override(struct pad_config *padbased_table) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{ {
if (fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) { if (!fw_config_probe(FW_CONFIG(DB_USB, DB_1C_LTE))) {
printk(BIOS_INFO, "Enable LTE-related GPIO pins.\n");
gpio_padbased_override(padbased_table, lte_enable_pads,
ARRAY_SIZE(lte_enable_pads));
} else {
if (board_id() >= 2) { if (board_id() >= 2) {
printk(BIOS_INFO, "Disable LTE-related GPIO pins on nirwen.\n"); printk(BIOS_INFO, "Disable LTE-related GPIO pins on nirwen.\n");
gpio_padbased_override(padbased_table, lte_disable_pads_nirwen, gpio_padbased_override(padbased_table, lte_disable_pads_nirwen,

19
src/mainboard/google/brya/variants/nivviks/gpio.c
View File

@@ -8,6 +8,8 @@
/* Pad configuration in ramstage for nivviks board_id = 0 */ /* Pad configuration in ramstage for nivviks board_id = 0 */
static const struct pad_config board_id0_overrides[] = { static const struct pad_config board_id0_overrides[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_CFG_GPO(GPP_D6, 1, DEEP), PAD_CFG_GPO(GPP_D6, 1, DEEP),
/* D7 : WLAN_CLKREQ_ODL */ /* D7 : WLAN_CLKREQ_ODL */
@@ -16,6 +18,10 @@ static const struct pad_config board_id0_overrides[] = {
PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
/* H3 : WLAN_PCIE_WAKE_ODL */ /* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
/* R4 : I2S2_SCLK ==> I2S_SPK_BCLK_R */ /* R4 : I2S2_SCLK ==> I2S_SPK_BCLK_R */
PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2), PAD_CFG_NF(GPP_R4, NONE, DEEP, NF2),
/* R5 : I2S2_SFRM ==> I2S_SPK_LRCK_R */ /* R5 : I2S2_SFRM ==> I2S_SPK_LRCK_R */
@@ -40,6 +46,8 @@ static const struct pad_config board_id0_overrides[] = {
/* Pad configuration in ramstage for nivviks board_id >= 1 */ /* Pad configuration in ramstage for nivviks board_id >= 1 */
static const struct pad_config override_gpio_table[] = { static const struct pad_config override_gpio_table[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_CFG_GPO(GPP_D6, 1, DEEP), PAD_CFG_GPO(GPP_D6, 1, DEEP),
/* D7 : WLAN_CLKREQ_ODL */ /* D7 : WLAN_CLKREQ_ODL */
@@ -48,6 +56,10 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
/* H3 : WLAN_PCIE_WAKE_ODL */ /* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
/* Configure the virtual CNVi Bluetooth I2S GPIO pads */ /* Configure the virtual CNVi Bluetooth I2S GPIO pads */
/* BT_I2S_BCLK */ /* BT_I2S_BCLK */
@@ -70,6 +82,8 @@ static const struct pad_config override_gpio_table[] = {
/* Pad configuration in ramstage for nirwen */ /* Pad configuration in ramstage for nirwen */
static const struct pad_config override_gpio_table_nirwen[] = { static const struct pad_config override_gpio_table_nirwen[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* B4 : SSD_PERST_L */ /* B4 : SSD_PERST_L */
PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_B4, 1, LOCK_CONFIG),
/* D6 : SRCCLKREQ1# ==> SSD_CLKREQ_ODL */ /* D6 : SRCCLKREQ1# ==> SSD_CLKREQ_ODL */
@@ -86,6 +100,11 @@ static const struct pad_config override_gpio_table_nirwen[] = {
PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
/* H3 : WLAN_PCIE_WAKE_ODL */ /* H3 : WLAN_PCIE_WAKE_ODL */
PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_H3, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
/* Configure the virtual CNVi Bluetooth I2S GPIO pads */ /* Configure the virtual CNVi Bluetooth I2S GPIO pads */
/* BT_I2S_BCLK */ /* BT_I2S_BCLK */
PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3), PAD_CFG_NF(GPP_VGPIO_30, NONE, DEEP, NF3),

21
src/mainboard/google/brya/variants/pujjo/fw_config.c
View File

@@ -5,20 +5,17 @@
#include <console/console.h> #include <console/console.h>
#include <fw_config.h> #include <fw_config.h>
static const struct pad_config lte_enable_pads[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
};
static const struct pad_config lte_disable_pads[] = { static const struct pad_config lte_disable_pads[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_NC(GPP_A8, NONE),
/* D6 : WWAN_EN */ /* D6 : WWAN_EN */
PAD_NC(GPP_D6, NONE), PAD_NC(GPP_D6, NONE),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_F12, NONE, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_NC(GPP_H19, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_NC(GPP_H23, NONE),
}; };
static const struct pad_config sd_disable_pads[] = { static const struct pad_config sd_disable_pads[] = {
@@ -32,11 +29,7 @@ static const struct pad_config sd_disable_pads[] = {
void fw_config_gpio_padbased_override(struct pad_config *padbased_table) void fw_config_gpio_padbased_override(struct pad_config *padbased_table)
{ {
if (fw_config_probe(FW_CONFIG(LTE, LTE_PRESENT))) { if (!fw_config_probe(FW_CONFIG(LTE, LTE_PRESENT))) {
printk(BIOS_INFO, "Enable LTE-related GPIO pins.\n");
gpio_padbased_override(padbased_table, lte_enable_pads,
ARRAY_SIZE(lte_enable_pads));
} else {
printk(BIOS_INFO, "Disable LTE-related GPIO pins.\n"); printk(BIOS_INFO, "Disable LTE-related GPIO pins.\n");
gpio_padbased_override(padbased_table, lte_disable_pads, gpio_padbased_override(padbased_table, lte_disable_pads,
ARRAY_SIZE(lte_disable_pads)); ARRAY_SIZE(lte_disable_pads));

6
src/mainboard/google/brya/variants/pujjo/gpio.c
View File

@@ -7,6 +7,8 @@
/* Pad configuration in ramstage for Pujjo */ /* Pad configuration in ramstage for Pujjo */
static const struct pad_config override_gpio_table[] = { static const struct pad_config override_gpio_table[] = {
/* A8 : WWAN_RF_DISABLE_ODL */
PAD_CFG_GPO(GPP_A8, 1, DEEP),
/* D3 : WCAM_RST_L ==> NC */ /* D3 : WCAM_RST_L ==> NC */
PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_D3, NONE, LOCK_CONFIG),
/* D6 : SRCCLKREQ1# ==> WWAN_EN */ /* D6 : SRCCLKREQ1# ==> WWAN_EN */
@@ -17,8 +19,12 @@ static const struct pad_config override_gpio_table[] = {
PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG), PAD_NC_LOCK(GPP_D16, NONE, LOCK_CONFIG),
/* F12 : WWAN_RST_L */ /* F12 : WWAN_RST_L */
PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG), PAD_CFG_GPO_LOCK(GPP_F12, 1, LOCK_CONFIG),
/* H19 : SOC_I2C_SUB_INT_ODL */
PAD_CFG_GPI_APIC(GPP_H19, NONE, PLTRST, LEVEL, NONE),
/* H22 : WCAM_MCLK_R ==> NC */ /* H22 : WCAM_MCLK_R ==> NC */
PAD_NC(GPP_H22, NONE), PAD_NC(GPP_H22, NONE),
/* H23 : WWAN_SAR_DETECT_ODL */
PAD_CFG_GPO(GPP_H23, 1, DEEP),
}; };
/* Early pad configuration in bootblock */ /* Early pad configuration in bootblock */