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mb/system76/adl: darp8,lemp11: Disable RTD3 on SATA port

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After switching to S3, the use of RTD3 on the SATA port breaks drives
exiting D3cold.

Change-Id: I86b1c1e5081df9c462b22a724cf155d2a5507522
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
2023-07-19 10:41:08 -06:00
committed by Tim Crawford
parent 0bbcbd18fc
commit 05584923bf
2 changed files with 0 additions and 12 deletions
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6
src/mainboard/system76/adl/variants/darp8/overridetree.cb
View File

@@ -151,12 +151,6 @@ chip soc/intel/alderlake
.clk_req = 4, .clk_req = 4,
.flags = PCIE_RP_LTR, .flags = PCIE_RP_LTR,
}" }"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_B16)" # M2_SSD1_RST#
register "srcclk_pin" = "4" # SSD1_CLKREQ#
device generic 0 on end
end
end end
device ref pmc hidden device ref pmc hidden
chip drivers/intel/pmc_mux chip drivers/intel/pmc_mux

6
src/mainboard/system76/adl/variants/lemp11/overridetree.cb
View File

@@ -137,12 +137,6 @@ chip soc/intel/alderlake
.clk_req = 1, .clk_req = 1,
.flags = PCIE_RP_LTR, .flags = PCIE_RP_LTR,
}" }"
chip soc/intel/common/block/pcie/rtd3
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D16)" # SSD1_PWR_EN
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_H0)" # M2_SSD1_RST#
register "srcclk_pin" = "1" # SSD1_CLKREQ#
device generic 0 on end
end
end end
device ref pmc hidden device ref pmc hidden
chip drivers/intel/pmc_mux chip drivers/intel/pmc_mux