Kconfig!

Works on Kontron, qemu, and serengeti. 

Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>

tested on abuild only. 

Acked-by: Ronald G. Minnich <rminnich@gmail.com>




git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/cpu/Kconfig

@@ -0,0 +1,18 @@
+#source src/cpu/amd/Kconfig
+source src/cpu/emulation/Kconfig
+source src/cpu/intel/Kconfig
+source src/cpu/via/Kconfig
+source src/cpu/x86/Kconfig
+source src/cpu/ppc/Kconfig
+
+config DCACHE_RAM_BASE
+	hex
+	default 0xffdf8000 if CPU_INTEL_CORE
+
+config DCACHE_RAM_SIZE
+	hex
+	default 0x8000 if CPU_INTEL_CORE
+
+config SMP
+	bool
+	default n

src/cpu/Makefile.inc

@@ -0,0 +1,8 @@
+#input amd
+subdirs-y += intel
+subdirs-y += via
+subdirs-y += emulation
+#input ppc
+#input simple_init
+#input via
+#input x86

src/cpu/amd/Kconfig

@@ -0,0 +1,8 @@
+source src/cpu/amd/socket_754/Kconfig
+source src/cpu/amd/socket_939/Kconfig
+source src/cpu/amd/socket_940/Kconfig
+source src/cpu/amd/socket_AM2/Kconfig
+source src/cpu/amd/socket_AM2r2/Kconfig
+source src/cpu/amd/socket_F/Kconfig
+source src/cpu/amd/socket_F_1207/Kconfig
+source src/cpu/amd/socket_S1G1/Kconfig

src/cpu/amd/socket_F/Kconfig

@@ -0,0 +1,3 @@
+config CPU_AMD_SOCKET_F
+	bool
+	default false

src/cpu/emulation/Kconfig

@@ -0,0 +1,2 @@
+source src/cpu/emulation/qemu-x86/Kconfig
+

src/cpu/emulation/Makefile.inc

@@ -0,0 +1 @@
+subdirs-y += qemu-x86

src/cpu/emulation/qemu-x86/Kconfig

@@ -0,0 +1,4 @@
+config CPU_EMULATION_QEMU_X86
+        bool
+        default false
+

src/cpu/emulation/qemu-x86/Makefile.inc

@@ -0,0 +1 @@
+obj-$(CONFIG_CPU_EMULATION_QEMU_X86) += northbridge.o

src/cpu/intel/Kconfig

@@ -0,0 +1,4 @@
+source src/cpu/intel/model_6ex/Kconfig
+source src/cpu/intel/model_6fx/Kconfig
+source src/cpu/intel/socket_mFCPGA478/Kconfig
+source src/cpu/intel/socket_PGA370/Kconfig

src/cpu/intel/Makefile.inc

@@ -0,0 +1,14 @@
+# Note: from here on down, we are socket-centric. Socket choice determines what other cpu files are included. 
+# Therefore:
+# ONLY include Makefile.inc from socket directories!
+
+subdirs-y += speedstep
+subdirs-y += socket_mFCPGA478
+subdirs-y += socket_PGA370
+
+#socket_mPGA478
+#socket_mPGA479M
+#socket_mPGA603
+#socket_mPGA604
+#socket_mPGA604_533Mhz
+#socket_mPGA604_800Mhz

src/cpu/intel/hyperthreading/Makefile.inc

@@ -0,0 +1 @@
+obj-y += intel_sibling.o

src/cpu/intel/microcode/Makefile.inc

@@ -0,0 +1 @@
+obj-y += microcode.o

src/cpu/intel/model_69x/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_69x_init.o

src/cpu/intel/model_6dx/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_6dx_init.o

src/cpu/intel/model_6ex/Kconfig

@@ -0,0 +1,4 @@
+config CPU_INTEL_CORE
+	bool
+	default n
+	select SMP

src/cpu/intel/model_6ex/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_6ex_init.o

src/cpu/intel/model_6fx/Kconfig

@@ -0,0 +1 @@
+# select HAVE_MOVNTI

src/cpu/intel/model_6fx/Makefile.inc

@@ -0,0 +1 @@
+driver-y += model_6fx_init.o

src/cpu/intel/model_6xx/Makefile.inc

@@ -0,0 +1,22 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Ron Minnich <rminnich@gmail.com>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+obj-y += model_6xx_init.o
+

src/cpu/intel/socket_PGA370/Kconfig

@@ -0,0 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+config CPU_INTEL_SOCKET_PGA370
+	bool
+	default false

src/cpu/intel/socket_PGA370/Makefile.inc

@@ -0,0 +1,34 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2009 Uwe Hermann <uwe@hermann-uwe.de>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+ifeq ($(CONFIG_CPU_INTEL_SOCKET_PGA370),y)
+	obj-y += socket_PGA370.o
+	subdirs-y += ../model_6xx
+	subdirs-y += ../../x86/tsc
+	subdirs-y += ../../x86/mtrr
+	subdirs-y += ../../x86/fpu
+	subdirs-y += ../../x86/mmx
+	subdirs-y += ../../x86/sse
+	subdirs-y += ../../x86/lapic
+	subdirs-y += ../../x86/cache
+	subdirs-y += ../../x86/smm
+	subdirs-y += ../microcode
+endif
+

src/cpu/intel/socket_mFCPGA478/Kconfig

@@ -0,0 +1,3 @@
+config CPU_INTEL_SOCKET_MFCPGA478
+	bool
+	default false

src/cpu/intel/socket_mFCPGA478/Makefile.inc

@@ -0,0 +1,17 @@
+ifeq ($(CONFIG_CPU_INTEL_SOCKET_MFCPGA478),y)
+	obj-y += socket_mFCPGA478.o
+	subdirs-y += ../model_69x
+	subdirs-y += ../model_6dx
+	subdirs-y += ../model_6ex
+	subdirs-y += ../model_6fx
+	subdirs-y += ../../x86/tsc
+	subdirs-y += ../../x86/mtrr
+	subdirs-y += ../../x86/fpu
+	subdirs-y += ../../x86/mmx
+	subdirs-y += ../../x86/sse
+	subdirs-y += ../../x86/lapic
+	subdirs-y += ../../x86/cache
+	subdirs-y += ../../x86/smm
+	subdirs-y += ../microcode
+	subdirs-y += ../hyperthreading
+endif

src/cpu/intel/speedstep/Makefile.inc

@@ -0,0 +1,5 @@
+ifeq ($(CONFIG_HAVE_ACPI_TABLES), y)
+ifeq ($(CONFIG_CPU_INTEL_SOCKET_MFCPGA478), y)
+	obj-y += acpi.o
+endif
+endif

src/cpu/ppc/Kconfig

@@ -0,0 +1 @@
+#

src/cpu/ppc/Makefile.inc

@@ -0,0 +1,6 @@
+#subdirs-y += ../simple_init
+#subdirs-y += mpc74xx
+#subdirs-y += ppc4xx
+#subdirs-y += ppc7xx
+#subdirs-y += ppc970
+

src/cpu/simple_init/Makefile.inc

@@ -0,0 +1 @@
+obj-y += simple_cpu_init.o

src/cpu/via/Kconfig

@@ -0,0 +1 @@
+source src/cpu/via/model_c7/Kconfig

src/cpu/via/Makefile.inc

@@ -0,0 +1,2 @@
+#subdirs-y += model_c7
+subdirs-y += model_c7

src/cpu/via/model_c7/Kconfig

@@ -0,0 +1,3 @@
+config CPU_VIA_C7
+	bool
+	default n

src/cpu/via/model_c7/Makefile.inc

@@ -0,0 +1,13 @@
+ifeq ($(CONFIG_CPU_VIA_C7),y)
+	subdirs-y += ../../x86/tsc
+	subdirs-y += ../../x86/mtrr
+	subdirs-y += ../../x86/fpu
+	subdirs-y += ../../x86/mmx
+	subdirs-y += ../../x86/sse
+	subdirs-y += ../../x86/lapic
+	subdirs-y += ../../x86/cache
+	subdirs-y += ../../x86/smm
+	subdirs-y += ../../intel/microcode
+endif
+
+obj-y += model_c7_init.o

src/cpu/x86/Kconfig

@@ -0,0 +1,11 @@
+config SERIAL_CPU_INIT
+	bool
+	default y
+
+config XIP_ROM_BASE
+	hex
+	default 0xfffe0000
+
+config XIP_ROM_BASE
+	hex
+	default 0x2000

src/cpu/x86/cache/Makefile.inc

@@ -0,0 +1 @@
+obj-y += cache.o

src/cpu/x86/fpu/Makefile.inc

@@ -0,0 +1 @@
+#

src/cpu/x86/lapic/Makefile.inc

@@ -0,0 +1,4 @@
+obj-y += lapic.o
+obj-y += lapic_cpu_init.o
+obj-y += secondary.o
+

src/cpu/x86/mmx/Makefile.inc

@@ -0,0 +1 @@
+#

src/cpu/x86/mtrr/Makefile.inc

@@ -0,0 +1 @@
+obj-y += mtrr.o

src/cpu/x86/smm/Makefile.inc

@@ -0,0 +1,45 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2008 coresystems GmbH
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+##
+
+##if CONFIG_HAVE_SMI_HANDLER
+##	object smmrelocate.S
+##
+##	smmobject smmhandler.S
+##	smmobject smihandler.o
+##
+##	makerule smm.o
+##		depends	"$(SMM-OBJECTS) $(TOP)/src/console/printk.o $(TOP)/src/console/vtxprintf.o $(LIBGCC_FILE_NAME)" 
+##		action	"$(CC) $(DISTRO_LFLAGS) -nostdlib -r -o $@ $^"
+##	end
+##
+##	makerule smm
+##		depends	"smm.o $(TOP)/src/cpu/x86/smm/smm.ld ldoptions" 
+##		action	"$(CC) $(DISTRO_LFLAGS) -nostdlib -nostartfiles -static -o smm.elf -T $(TOP)/src/cpu/x86/smm/smm.ld smm.o"
+##		action 	"$(CONFIG_CROSS_COMPILE)nm -n smm.elf | sort > smm.map"
+##		action  "$(OBJCOPY) -O binary smm.elf smm"
+##	end
+##
+##	makerule smm_bin.c
+##		depends "smm"
+##		action "(echo 'unsigned char smm[] = {'; od -vtx1 smm | sed -e 's,^[0-9]* *,,' -e 's:[0-9a-f][0-9a-f] :0x&,:g' -e 's:[0-9a-f][0-9a-f]$$:0x&,:'; echo '}; unsigned int smm_len = '; wc -c smm |awk '{print $$1;}' ; echo ';')  > smm_bin.c"
+##	end
+##
+##	object ./smm_bin.o
+##end

src/cpu/x86/sse/Makefile.inc

@@ -0,0 +1 @@
+#

src/cpu/x86/tsc/Makefile.inc

@@ -0,0 +1,7 @@
+obj-y += delay_tsc.o
+
+# default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0
+# if CONFIG_UDELAY_TSC 
+#	default CONFIG_HAVE_INIT_TIMER=1
+# 	object delay_tsc.o  
+# end