Rename {CPU|NB|SB}/amd/*_wrapper folders

This change renames the cpu/amd/agesa_wrapper, northbridge/
amd/agesa_wrapper, and southbridge/amd/cimx_wrapper folders
to {cpu|NB}/amd/agesa and {SB}/amd/agesa to shorten and
simplify the folder names.
There is also a fix to vendorcode/amd/agesa/lib/amdlib.c to
append "ull" to a trio of 64-bit hexadecimal constants to
allow abuild to run successfully.

Change-Id: I2455e0afb0361ad2e11da2b869ffacbd552cb715
Signed-off-by: Frank Vibrans <frank.vibrans@amd.com>
Signed-off-by: efdesign98 <efdesign98@gmail.com>
Reviewed-on: http://review.coreboot.org/51
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
This commit is contained in:
efdesign98
2011-06-20 17:38:49 -07:00
committed by Marc Jones
parent ee39ea7e7e
commit 05a89ab922
62 changed files with 192 additions and 192 deletions

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@@ -11,5 +11,5 @@ source src/southbridge/amd/sb600/Kconfig
source src/southbridge/amd/rs780/Kconfig
source src/southbridge/amd/sb700/Kconfig
source src/southbridge/amd/sb800/Kconfig
source src/southbridge/amd/cimx_wrapper/Kconfig
source src/southbridge/amd/cimx/Kconfig
source src/southbridge/amd/sr5650/Kconfig

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@@ -12,5 +12,5 @@ subdirs-$(CONFIG_SOUTHBRIDGE_AMD_SP5100) += sb700
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CS5530) += cs5530
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CS5535) += cs5535
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CS5536) += cs5536
subdirs-$(CONFIG_AMD_CIMX_SB800) += cimx_wrapper
subdirs-$(CONFIG_AMD_CIMX_SB800) += cimx

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@@ -17,4 +17,4 @@
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
source src/southbridge/amd/cimx_wrapper/sb800/Kconfig
source src/southbridge/amd/cimx/sb800/Kconfig

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@@ -16,4 +16,4 @@
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
#
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800) += sb800
subdirs-$(CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800) += sb800

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@@ -17,13 +17,13 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800
config SOUTHBRIDGE_AMD_CIMX_SB800
bool
select IOAPIC
if SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800
if SOUTHBRIDGE_AMD_CIMX_SB800
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/amd/cimx_wrapper/sb800/bootblock.c"
endif #SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800
default "southbridge/amd/cimx/sb800/bootblock.c"
endif #SOUTHBRIDGE_AMD_CIMX_SB800

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@@ -17,10 +17,10 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef _CIMX_WRAPPER_SB800_CHIP_H_
#define _CIMX_WRAPPER_SB800_CHIP_H_
#ifndef _CIMX_SB800_CHIP_H_
#define _CIMX_SB800_CHIP_H_
extern struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops;
extern struct chip_operations southbridge_amd_cimx_sb800_ops;
/*
* configuration set in mainboard/devicetree.cb
@@ -33,10 +33,10 @@ extern struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops;
* 3(GPP_CFGMODE_X2110) -PortA Lanes[1:0], PortB Lane2, PortC Lane3
* 4(GPP_CFGMODE_X1111) -PortA Lanes0, PortB Lane1, PortC Lane2, PortD Lane3
*/
struct southbridge_amd_cimx_wrapper_sb800_config
struct southbridge_amd_cimx_sb800_config
{
u32 boot_switch_sata_ide : 1;
u8 gpp_configuration;
};
#endif /* _CIMX_WRAPPER_SB800_CHIP_H_ */
#endif /* _CIMX_SB800_CHIP_H_ */

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@@ -20,6 +20,6 @@
#include <device/device.h>
#include "chip.h"
struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops = {
struct chip_operations southbridge_amd_cimx_sb800_ops = {
CHIP_NAME("AMD South Bridge SB800")
};

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@@ -27,7 +27,7 @@
#include "lpc.h" /* lpc_read_resources */
#include "SBPLATFORM.h" /* Platfrom Specific Definitions */
#include "cfg.h" /* sb800 Cimx configuration */
#include "chip.h" /* struct southbridge_amd_cimx_wrapper_sb800_config */
#include "chip.h" /* struct southbridge_amd_cimx_sb800_config */
/*implement in mainboard.c*/
@@ -316,8 +316,8 @@ static const struct pci_driver PORTD_driver __pci_driver = {
*/
static void sb800_enable(device_t dev)
{
struct southbridge_amd_cimx_wrapper_sb800_config *sb_chip =
(struct southbridge_amd_cimx_wrapper_sb800_config *)(dev->chip_info);
struct southbridge_amd_cimx_sb800_config *sb_chip =
(struct southbridge_amd_cimx_sb800_config *)(dev->chip_info);
sb800_cimx_config(sb_config);
printk(BIOS_DEBUG, "sb800_enable() ");
@@ -439,7 +439,7 @@ static void sb800_enable(device_t dev)
}
struct chip_operations southbridge_amd_cimx_wrapper_sb800_ops = {
struct chip_operations southbridge_amd_cimx_sb800_ops = {
CHIP_NAME("ATI SB800")
.enable_dev = sb800_enable,
};