Replace cache control magic numbers with symbols

Instead of opaque numbers like (1<<29), use
symbols like CR0_NoWriteThrough.

Change-Id: Id845e087fb472cfaf5f71beaf37fbf0d407880b5
Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Reviewed-on: http://review.coreboot.org/833
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/cpu/amd/agesa/cache_as_ram.inc

@@ -28,6 +28,7 @@
  */
 
 #include "gcccar.inc"
+#include <cpu/x86/cache.h>
 
 /*
  * XMM map:
@@ -88,7 +89,7 @@ disable_cache_as_ram:
 
   /* Disable cache */
   movl	%cr0, %eax
-  orl	$(1 << 30), %eax
+  orl	$CR0_CacheDisable, %eax
   movl	%eax, %cr0
 
   invd

src/cpu/amd/car/cache_as_ram.inc

@@ -19,6 +19,7 @@
  */
 
 #include <cpu/x86/mtrr.h>
+#include <cpu/x86/cache.h>
 #include <cpu/amd/mtrr.h>
 
 #define CacheSize		CONFIG_DCACHE_RAM_SIZE
@@ -320,7 +321,7 @@ wbcache_post_fam10_setup:
 
 	/* Enable cache. */
 	movl	%cr0, %eax
-	andl	$(~((1 << 30) | (1 << 29))), %eax
+	andl	$(~(CR0_CacheDisable | CR0_NoWriteThrough)), %eax
 	movl	%eax, %cr0
 
 	jmp_if_k8(fam10_end_part1)

src/cpu/amd/car/disable_cache_as_ram.c

@@ -21,12 +21,14 @@
  * be warned, this file will be used other cores and core 0 / node 0
  */
 
+#include <cpu/x86/cache.h>
+
 static inline __attribute__((always_inline)) void disable_cache_as_ram(void)
 {
 	msr_t msr;
 
 	/* disable cache */
-	write_cr0(read_cr0() | (1 << 30));
+	write_cr0(read_cr0() | CR0_CacheDisable);
 
 	msr.lo = 0;
 	msr.hi = 0;