cpu/intel/common: rework code previously moved to common cpu code

Rework the code moved to common code in CB:46274. This involves
simplification by using appropriate helpers for MSR and CPUID, using
macros instead of plain values for MSRs and cpu features and adding
documentation to the header.

Change-Id: I7615fc26625c44931577216ea42f0a733b99e131
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46588
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

src/cpu/intel/common/common.h

@@ -33,10 +33,16 @@ bool intel_ht_sibling(void);
  */
 void set_aesni_lock(void);
 
+/* Enable local CPU APIC TPR (Task Priority Register) updates */
 void enable_lapic_tpr(void);
 
+/* Enable DCA (Direct Cache Access) */
 void configure_dca_cap(void);
 
+/*
+ * Set EPB (Energy Performance Bias)
+ * Possible values are 0 (performance) to 15 (powersave).
+ */
 void set_energy_perf_bias(u8 policy);
 
 #endif