soc/intel/apollolake: Wrap lines at 80 columns

Fix the following warning detected by checkpatch.pl:

WARNING: line over 80 characters

TEST=Build for reef

Change-Id: I4fbe95037ca4b52e64ba37e5c739af4a03f64feb
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/18728
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Lee Leahy
2017-03-09 10:59:25 -08:00
committed by Martin Roth
parent a444753596
commit 07441b5ae6
14 changed files with 69 additions and 52 deletions

View File

@@ -62,14 +62,16 @@ struct soc_intel_apollolake_config {
/* [30:24] SDR50 mode Number of dealy elements.Each = 125pSec.
* [22:16] DDR50 mode Number of dealy elements.Each = 125pSec.
* [14:8] SDR25/HS50 mode Number of dealy elements.Each = 125pSec.
* [6:0] SDR12/Compatibility mode Number of dealy elements.Each = 125pSec.
* [6:0] SDR12/Compatibility mode Number of dealy elements.
* Each = 125pSec.
*/
uint32_t emmc_tx_data_cntl2;
/* [30:24] SDR50 mode Number of dealy elements.Each = 125pSec.
* [22:16] DDR50 mode Number of dealy elements.Each = 125pSec.
* [14:8] SDR25/HS50 mode Number of dealy elements.Each = 125pSec.
* [6:0] SDR12/Compatibility mode Number of dealy elements.Each = 125pSec.
* [6:0] SDR12/Compatibility mode Number of dealy elements.
* Each = 125pSec.
*/
uint32_t emmc_rx_cmd_data_cntl1;