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mb/google/volteer/var/voxel: Add settings for noise mitgation

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Enable acoustic noise mitgation for volteer platforms.

BUG=b:179328166
BRANCH=none
TEST= Measure the change in noise level by changing the values
in devicetree.

Signed-off-by: Pan Sheng-Liang <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I279a85c7741094bb7ddf0c1fde74b31189b12171
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50293
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Sheng-Liang Pan
2021-02-05 10:42:54 +08:00
committed by Patrick Georgi
parent 448ecc0e06
commit 076d9b9778
1 changed files with 11 additions and 0 deletions
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11
src/mainboard/google/volteer/variants/voxel/overridetree.cb
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@@ -19,6 +19,17 @@ chip soc/intel/tigerlake
# Disable SRCCLKREQ1#
register "PcieClkSrcUsage[1]" = "PCIE_CLK_NOTUSED"
# Acoustic settings
register "AcousticNoiseMitigation" = "1"
register "SlowSlewRate[VR_DOMAIN_IA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_GT]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_SA]" = "SLEW_FAST_8"
register "SlowSlewRate[VR_DOMAIN_VLCC]" = "SLEW_FAST_8"
register "FastPkgCRampDisable[VR_DOMAIN_IA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_GT]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_SA]" = "1"
register "FastPkgCRampDisable[VR_DOMAIN_VLCC]" = "1"
device domain 0 on
device ref dptf on
chip drivers/intel/dptf