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sb,soc/intel: Replace smm_southbridge_enable_smi()

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Change-Id: I8a2e8b0c104d9e08f07aeb6a2c32106480ace3e5
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41961
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki
2020-06-10 12:44:03 +03:00
committed by Patrick Georgi
parent 040c531158
commit 0778c86b3b
17 changed files with 65 additions and 25 deletions
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7
src/soc/intel/baytrail/cpu.c
View File

@@ -178,6 +178,11 @@ static void relocation_handler(int cpu, uintptr_t curr_smbase,
smm_state->smbase = staggered_smbase;
}
static void post_mp_init(void)
{
global_smi_enable();
}
static const struct mp_ops mp_ops = {
.pre_mp_init = pre_mp_init,
.get_cpu_count = get_cpu_count,
@@ -186,7 +191,7 @@ static const struct mp_ops mp_ops = {
.pre_mp_smm_init = smm_southbridge_clear_state,
.per_cpu_smm_trigger = per_cpu_smm_trigger,
.relocation_handler = relocation_handler,
.post_mp_init = smm_southbridge_enable_smi,
.post_mp_init = post_mp_init,
};
void baytrail_init_cpus(struct device *dev)

8
src/soc/intel/baytrail/smm.c
View File

@@ -70,9 +70,8 @@ static void smm_southcluster_route_gpios(void)
outl(alt_gpio_reg, alt_gpio_smi);
}
void smm_southbridge_enable_smi(void)
static void smm_southbridge_enable(uint16_t pm1_events)
{
uint16_t pm1_events = PWRBTN_EN | GBL_EN;
printk(BIOS_DEBUG, "Enabling SMIs.\n");
if (!smm_save_params[SMM_SAVE_PARAM_PCIE_WAKE_ENABLE])
@@ -94,6 +93,11 @@ void smm_southbridge_enable_smi(void)
enable_smi(APMC_EN | SLP_SMI_EN | GBL_SMI_EN | EOS);
}
void global_smi_enable(void)
{
smm_southbridge_enable(PWRBTN_EN | GBL_EN);
}
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
/*