sb and soc: Enforce correct offset of member "chromeos" in global_nvs_t

The padding has recently been broken in commit 90ebf96df5
("soc/intel/skylake: Add GNVS variables and include SGX ASL") and fixed
again in commit af88398887 ("soc/intel/skylake: Fix broken GNVS offset
for chromeos").  Avoid this bug in the future.

Change-Id: I1bf3027bba239c8747ad26a3130a7e047d3b8c94
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-on: https://review.coreboot.org/22229
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Jonathan Neuschäfer
2017-10-30 17:20:18 +01:00
committed by Martin Roth
parent 7bd4715a70
commit 0781cbe1d3
12 changed files with 43 additions and 14 deletions

View File

@@ -14,9 +14,11 @@
* GNU General Public License for more details.
*/
#include <commonlib/helpers.h>
#include <compiler.h>
#include "vendorcode/google/chromeos/gnvs.h"
typedef struct {
typedef struct global_nvs_t {
/* Miscellaneous */
u16 osys; /* 0x00 - Operating System */
u8 smif; /* 0x02 - SMI function call ("TRAP") */
@@ -150,6 +152,7 @@ typedef struct {
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
} __packed global_nvs_t;
check_member(global_nvs_t, chromeos, 0x100);
#ifdef __SMM__
/* Used in SMM to find the ACPI GNVS address */