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intel/car/cache_as_ram.inc: Prepare for dynamic CONFIG_RAMTOP

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Change-Id: I02881ce465cb3835a6fa7c06b718aa42d0d327ec
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15227
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)
This commit is contained in:
Kyösti Mälkki
2016-06-17 17:22:00 +03:00
committed by Martin Roth
parent 633c57d1d1
commit 07921540dd
39 changed files with 79 additions and 68 deletions
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4
src/mainboard/msi/ms6119/romstage.c
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@@ -24,6 +24,7 @@
#include <northbridge/intel/i440bx/raminit.h>
#include <delay.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83977tf/w83977tf.h>
#include <lib.h>
@@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
#include <cpu/intel/romstage.h>
void main(unsigned long bist)
void mainboard_romstage_entry(unsigned long bist)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();

4
src/mainboard/msi/ms6147/romstage.c
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@@ -24,6 +24,7 @@
#include <northbridge/intel/i440bx/raminit.h>
#include <delay.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83977tf/w83977tf.h>
#include <lib.h>
@@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
#include <cpu/intel/romstage.h>
void main(unsigned long bist)
void mainboard_romstage_entry(unsigned long bist)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();

4
src/mainboard/msi/ms6156/romstage.c
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@@ -24,6 +24,7 @@
#include <northbridge/intel/i440bx/raminit.h>
#include <delay.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <superio/winbond/common/winbond.h>
#include <superio/winbond/w83977tf/w83977tf.h>
#include <lib.h>
@@ -35,8 +36,7 @@ int spd_read_byte(unsigned int device, unsigned int address)
return smbus_read_byte(device, address);
}
#include <cpu/intel/romstage.h>
void main(unsigned long bist)
void mainboard_romstage_entry(unsigned long bist)
{
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
console_init();

4
src/mainboard/msi/ms6178/romstage.c
View File

@@ -24,14 +24,14 @@
#include <superio/winbond/w83627hf/w83627hf.h>
#include <northbridge/intel/i82810/raminit.h>
#include <cpu/x86/bist.h>
#include <cpu/intel/romstage.h>
#include <southbridge/intel/i82801ax/i82801ax.h>
#include <lib.h>
#define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
#define DUMMY_DEV PNP_DEV(0x2e, 0)
#include <cpu/intel/romstage.h>
void main(unsigned long bist)
void mainboard_romstage_entry(unsigned long bist)
{
w83627hf_set_clksel_48(DUMMY_DEV);
winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);