From 07cfe5392a4527db4c1295c0d28c3b5447dc4f95 Mon Sep 17 00:00:00 2001 From: Shuo Liu Date: Tue, 20 Feb 2024 02:21:49 +0800 Subject: [PATCH] soc/intel/xeon_sp: Move MEM_ADDR_64MB_SHIFT_BITS to Xeon-SP Move MEM_ADDR_64MB_SHIFT_BITS from FSP headers to Xeon-SP common layer to reduce the dependency. TEST=intel/archercity CRB Change-Id: I4e1a652ad58233f7514cb9b23813d75144b8d435 Signed-off-by: Shuo Liu Reviewed-on: https://review.coreboot.org/c/coreboot/+/80634 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan --- src/soc/intel/xeon_sp/include/soc/util.h | 2 ++ src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h | 1 - src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h | 1 - src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h | 1 - 4 files changed, 2 insertions(+), 3 deletions(-) diff --git a/src/soc/intel/xeon_sp/include/soc/util.h b/src/soc/intel/xeon_sp/include/soc/util.h index 43bf9d68f8..dd84f0cd02 100644 --- a/src/soc/intel/xeon_sp/include/soc/util.h +++ b/src/soc/intel/xeon_sp/include/soc/util.h @@ -6,6 +6,8 @@ #include #include +#define MEM_ADDR_64MB_SHIFT_BITS 26 + void lock_pam0123(void); void unlock_pam_regions(void); diff --git a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h index 573b5c3f0a..4a74710676 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/cooperlake_sp/hob_memmap.h @@ -57,7 +57,6 @@ are permitted provided that the following conditions are met: #define MAX_IMC_PER_SOCKET 2 #define MEM_TYPE_RESERVED (1 << 8) -#define MEM_ADDR_64MB_SHIFT_BITS 26 #define NGN_MAX_SERIALNUMBER_STRLEN 4 #define NGN_MAX_PARTNUMBER_STRLEN 20 diff --git a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h index 89897bcc7a..0b8ac7322e 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/sapphirerapids_sp/defs_memmap.h @@ -46,7 +46,6 @@ are permitted provided that the following conditions are met: #define MEMTYPE_VOLATILE_MASK (MEMTYPE_1LM_MASK | MEMTYPE_2LM_MASK) #define MEM_TYPE_RESERVED (1 << 8) -#define MEM_ADDR_64MB_SHIFT_BITS 26 //------------------------------------------------------------------------------------ // Uncomment line(s) below to override macro definitions in FSP MemoryMapDataHob.h diff --git a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h index c35b2f6285..f97056a4df 100644 --- a/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h +++ b/src/vendorcode/intel/fsp/fsp2_0/skylake_sp/hob_memmap.h @@ -43,7 +43,6 @@ are permitted provided that the following conditions are met: #define MAX_IMC_PER_SOCKET 2 #define MEM_TYPE_RESERVED (1 << 8) -#define MEM_ADDR_64MB_SHIFT_BITS 26 // // System Memory Map HOB information