AGESA vendorcode: Build a common amdlib
Having CFLAGS with -Os disables -falign-function, for unlucky builds this may delay entry to ramstage by 600ms. Build the low-level IO functions aligned with -O2 instead. Change-Id: Ice6781666a0834f1e8e60a0c93048ac8472f27d9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/14414 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
@ -17,6 +17,35 @@
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#include <northbridge/amd/agesa/agesawrapper.h>
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#include "amdlib.h"
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UINT64
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MsrRead (
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IN UINT32 MsrAddress
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);
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VOID
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MsrWrite (
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IN UINT32 MsrAddress,
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IN UINT64 Value
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);
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UINT64
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MsrRead (
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IN UINT32 MsrAddress
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)
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{
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return __readmsr (MsrAddress);
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}
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VOID
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MsrWrite (
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IN UINT32 MsrAddress,
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IN UINT64 Value
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)
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{
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__writemsr (MsrAddress, Value);
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}
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#if !IS_ENABLED(CONFIG_BOARD_AMD_DINAR)
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void amd_initcpuio(void)
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{
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@ -2,8 +2,8 @@
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#SB800 CIMx share AGESA V5 lib code
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ifneq ($(CONFIG_CPU_AMD_AGESA),y)
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AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
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romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
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AGESA_INC := -I$(AGESA_ROOT)/ \
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-I$(AGESA_ROOT)/../common \
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@ -2,8 +2,8 @@
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#SB800 CIMx share AGESA V5 lib code
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ifneq ($(CONFIG_CPU_AMD_AGESA),y)
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AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
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romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
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AGESA_INC := -I$(AGESA_ROOT)/ \
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-I$(AGESA_ROOT)/../common \
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@ -2,8 +2,8 @@
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#SB800 CIMx share AGESA V5 lib code
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ifneq ($(CONFIG_CPU_AMD_AGESA),y)
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AGESA_ROOT ?= src/vendorcode/amd/agesa/f14
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romstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/Lib/amdlib.c
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romstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
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ramstage-y += ../../../../$(AGESA_ROOT)/../common/amdlib.c
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AGESA_INC := -I$(AGESA_ROOT)/ \
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-I$(AGESA_ROOT)/../common \
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@ -16,7 +16,7 @@
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#include "AGESA.h"
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#include <northbridge/amd/agesa/BiosCallOuts.h>
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#include <Lib/amdlib.h>
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#include <amdlib.h>
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#include <vendorcode/amd/agesa/f14/Proc/CPU/heapManager.h>
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#include <vendorcode/amd/cimx/sb800/SB800.h>
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#include <stdint.h>
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@ -18,7 +18,7 @@
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#define _PLATFORM_GNB_PCIE_COMPLEX_H
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#include <vendorcode/amd/agesa/f14/AGESA.h>
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#include <vendorcode/amd/agesa/f14/Lib/amdlib.h>
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#include <amdlib.h>
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/**
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* @brief Graphic NorthBridge (GNB) General Purpose Port (GPP)
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@ -18,7 +18,7 @@
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#include <delay.h>
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#include "Porting.h"
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#include "AGESA.h"
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#include <Lib/amdlib.h>
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#include <amdlib.h>
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#include <Proc/Fch/Fch.h>
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#include <Proc/Fch/Common/FchCommonCfg.h>
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#include <Proc/Fch/FchPlatform.h>
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@ -8,6 +8,8 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY16_KB) += f16kb
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ifeq ($(CONFIG_CPU_AMD_AGESA),y)
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subdirs-y += common
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classes-y += libagesa
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libagesa-y =
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35
src/vendorcode/amd/agesa/common/Makefile.inc
Normal file
35
src/vendorcode/amd/agesa/common/Makefile.inc
Normal file
@ -0,0 +1,35 @@
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#*****************************************************************************
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#
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# Copyright (c) 2011, Advanced Micro Devices, Inc.
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
|
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# modification, are permitted provided that the following conditions are met:
|
||||
# * Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# * Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in the
|
||||
# documentation and/or other materials provided with the distribution.
|
||||
# * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
||||
# its contributors may be used to endorse or promote products derived
|
||||
# from this software without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
# WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
# DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||
# DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
# LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
# ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
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# SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#*****************************************************************************
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libagesa-y += amdlib.c
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# Do not optimise performance-critical low-level IO for size with -Os,
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# request -O2 with -falign-functions.
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$(obj)/libagesa/vendorcode/amd/agesa/common/amdlib.o: CFLAGS_libagesa += -O2
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@ -286,6 +286,7 @@ LibAmdReadCpuReg (
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break;
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default:
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*Value = -1;
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break;
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}
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}
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VOID
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@ -314,7 +315,7 @@ LibAmdWriteCpuReg (
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__writedr (7, Value);
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break;
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default:
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;
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break;
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}
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}
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VOID
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@ -446,15 +447,6 @@ LibAmdCLFlush (
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}
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#endif //__SSE3__
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VOID
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IdsOutPort (
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IN UINT32 Addr,
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IN UINT32 Value,
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IN UINT32 Flag
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)
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{
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__outdword ((UINT16) Addr, Value);
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}
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VOID
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StopHere (
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VOID
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@ -464,6 +456,12 @@ StopHere (
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while (x);
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}
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VOID
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LibAmdFinit()
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{
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/* TODO: finit */
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__asm__ volatile ("finit");
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}
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/*---------------------------------------------------------------------------------------*/
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/**
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* Read IO port
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@ -498,6 +496,7 @@ LibAmdIoRead (
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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}
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@ -535,6 +534,7 @@ LibAmdIoWrite (
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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}
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@ -561,7 +561,7 @@ LibAmdIoRMW (
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{
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UINT32 TempData = 0;
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UINT32 TempMask = 0;
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UINT32 Value;
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UINT32 Value = 0;
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LibAmdGetDataFromPtr (AccessWidth, Data, DataMask, &TempData, &TempMask);
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LibAmdIoRead (AccessWidth, IoAddress, &Value, StdHeader);
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Value = (Value & (~TempMask)) | TempData;
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@ -635,6 +635,7 @@ LibAmdMemRead (
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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}
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@ -673,6 +674,7 @@ LibAmdMemWrite (
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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}
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/*---------------------------------------------------------------------------------------*/
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@ -1198,6 +1200,7 @@ LibAmdGetDataFromPtr (
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break;
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default:
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IDS_ERROR_TRAP;
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break;
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}
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}
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@ -1238,6 +1241,7 @@ LibAmdAccessWidth (
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default:
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Width = 0;
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IDS_ERROR_TRAP;
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break;
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}
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return Width;
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}
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@ -9,13 +9,13 @@
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* @xrefitem bom "File Content Label" "Release Content"
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* @e project: AGESA
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* @e sub-project: Lib
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* @e \$Revision: 85030 $ @e \$Date: 2012-12-26 00:20:10 -0600 (Wed, 26 Dec 2012) $
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* @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
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*
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*/
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/*
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******************************************************************************
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*****************************************************************************
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*
|
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* Copyright (c) 2008 - 2013, Advanced Micro Devices, Inc.
|
||||
* Copyright (c) 2011, Advanced Micro Devices, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
@ -39,16 +39,23 @@
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
******************************************************************************
|
||||
**/
|
||||
*
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* ***************************************************************************
|
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*
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*/
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#ifndef _AMD_LIB_H_
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#define _AMD_LIB_H_
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/*----------------------------------------------------------------------------------------
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* D E F I N I T I O N S A N D M A C R O S
|
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*----------------------------------------------------------------------------------------
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*/
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#define IOCF8 0xCF8
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#define IOCFC 0xCFC
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// Reg Values for ReadCpuReg and WriteCpuReg
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#define CR0_REG 0x00
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#define CR4_REG 0x04
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#define DR0_REG 0x10
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#define DR1_REG 0x11
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@ -56,7 +63,6 @@
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#define DR3_REG 0x13
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#define DR7_REG 0x17
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// PROTOTYPES FOR amdlib32.asm
|
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UINT8
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ReadIo8 (
|
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IN UINT16 Address
|
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@ -125,7 +131,8 @@ Write64Mem32 (
|
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|
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UINT64
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ReadTSC (
|
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VOID);
|
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VOID
|
||||
);
|
||||
|
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// MSR
|
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VOID
|
||||
@ -346,15 +353,34 @@ LibAmdCLFlush (
|
||||
IN UINT8 Count
|
||||
);
|
||||
|
||||
VOID F10RevDProbeFilterCritical (
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN UINT32 PciRegister
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdFinit (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
StopHere (
|
||||
VOID
|
||||
);
|
||||
|
||||
/* For f14 or older. */
|
||||
VOID
|
||||
LibAmdFinit (
|
||||
VOID);
|
||||
CpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value
|
||||
);
|
||||
|
||||
UINT8
|
||||
ReadNumberOfCpuCores(
|
||||
VOID
|
||||
);
|
||||
|
||||
/* From 16kb, no implementation supplied. */
|
||||
VOID
|
||||
LibAmdFnclex (
|
||||
VOID);
|
||||
@ -368,4 +394,5 @@ LibAmdWriteMxcsr (
|
||||
IN UINT32 *Value
|
||||
);
|
||||
|
||||
|
||||
#endif // _AMD_LIB_H_
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,374 +0,0 @@
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* AMD Library
|
||||
*
|
||||
* Contains interface to the AMD AGESA library
|
||||
*
|
||||
* @xrefitem bom "File Content Label" "Release Content"
|
||||
* @e project: AGESA
|
||||
* @e sub-project: Lib
|
||||
* @e \$Revision: 44323 $ @e \$Date: 2010-12-22 01:24:58 -0700 (Wed, 22 Dec 2010) $
|
||||
*
|
||||
*/
|
||||
/*
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2011, Advanced Micro Devices, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
**/
|
||||
|
||||
#ifndef _AMD_LIB_H_
|
||||
#define _AMD_LIB_H_
|
||||
|
||||
#define IOCF8 0xCF8
|
||||
#define IOCFC 0xCFC
|
||||
|
||||
// Reg Values for ReadCpuReg and WriteCpuReg
|
||||
#define CR4_REG 0x04
|
||||
#define DR0_REG 0x10
|
||||
#define DR1_REG 0x11
|
||||
#define DR2_REG 0x12
|
||||
#define DR3_REG 0x13
|
||||
#define DR7_REG 0x17
|
||||
|
||||
// PROTOTYPES FOR amdlib32.asm
|
||||
UINT8
|
||||
ReadIo8 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
ReadIo16 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
ReadIo32 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo8 (
|
||||
IN UINT16 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo16 (
|
||||
IN UINT16 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo32 (
|
||||
IN UINT16 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT8
|
||||
Read64Mem8 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
Read64Mem16 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
Read64Mem32 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem8 (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem16 (
|
||||
IN UINT64 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem32 (
|
||||
IN UINT64 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT64
|
||||
ReadTSC (VOID);
|
||||
|
||||
// MSR
|
||||
VOID
|
||||
LibAmdMsrRead (
|
||||
IN UINT32 MsrAddress,
|
||||
OUT UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMsrWrite (
|
||||
IN UINT32 MsrAddress,
|
||||
IN UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// IO
|
||||
VOID
|
||||
LibAmdIoRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Memory or MMIO
|
||||
VOID
|
||||
LibAmdMemRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// PCI
|
||||
VOID
|
||||
LibAmdPciRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciReadBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
OUT UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWriteBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
IN UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciFindNextCap (
|
||||
IN OUT PCI_ADDR *Address,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// CPUID
|
||||
VOID
|
||||
LibAmdCpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Utility Functions
|
||||
VOID
|
||||
LibAmdMemFill (
|
||||
IN VOID *Destination,
|
||||
IN UINT8 Value,
|
||||
IN UINTN FillLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemCopy (
|
||||
IN VOID *Destination,
|
||||
IN VOID *Source,
|
||||
IN UINTN CopyLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT32
|
||||
LibAmdGetPackageType (
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT8
|
||||
LibAmdBitScanReverse (
|
||||
IN UINT32 value
|
||||
);
|
||||
UINT8
|
||||
LibAmdBitScanForward (
|
||||
IN UINT32 value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdReadCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
OUT UINT32 *Value
|
||||
);
|
||||
VOID
|
||||
LibAmdWriteCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
IN UINT32 Value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdWriteBackInvalidateCache (
|
||||
IN VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdSimNowEnterDebugger (VOID);
|
||||
|
||||
VOID
|
||||
LibAmdHDTBreakPoint (VOID);
|
||||
|
||||
UINT8
|
||||
LibAmdAccessWidth (
|
||||
IN ACCESS_WIDTH AccessWidth
|
||||
);
|
||||
|
||||
#ifdef __SSE3__
|
||||
VOID F10RevDProbeFilterCritical (
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN UINT32 PciRegister
|
||||
);
|
||||
|
||||
VOID LibAmdCLFlush (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Count
|
||||
);
|
||||
#endif
|
||||
|
||||
VOID
|
||||
IdsOutPort (
|
||||
IN UINT32 Addr,
|
||||
IN UINT32 Value,
|
||||
IN UINT32 Flag
|
||||
);
|
||||
|
||||
VOID StopHere(VOID);
|
||||
|
||||
VOID
|
||||
CpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value
|
||||
);
|
||||
|
||||
UINT8
|
||||
ReadNumberOfCpuCores(
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif // _AMD_LIB_H_
|
||||
@ -98,7 +98,6 @@ libagesa-y += Proc/Common/AmdS3LateRestore.c
|
||||
libagesa-y += Proc/CPU/Table.c
|
||||
libagesa-y += Proc/HT/htInterface.c
|
||||
libagesa-y += Proc/IDS/Perf/IdsPerf.c
|
||||
libagesa-y += Lib/amdlib.c
|
||||
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
|
||||
libagesa-y += Proc/Mem/Main/minit.c
|
||||
libagesa-y += Proc/Mem/Feat/INTLVRN/mfintlvrn.c
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,406 +0,0 @@
|
||||
/* $NoKeywords:$ */
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* AMD Library
|
||||
*
|
||||
* Contains interface to the AMD AGESA library
|
||||
*
|
||||
* @xrefitem bom "File Content Label" "Release Content"
|
||||
* @e project: AGESA
|
||||
* @e sub-project: Lib
|
||||
* @e \$Revision: 44324 $ @e \$Date: 2010-12-22 17:16:51 +0800 (Wed, 22 Dec 2010) $
|
||||
*
|
||||
*/
|
||||
/*
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2011, Advanced Micro Devices, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
******************************************************************************
|
||||
**/
|
||||
|
||||
#ifndef _AMD_LIB_H_
|
||||
#define _AMD_LIB_H_
|
||||
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* D E F I N I T I O N S A N D M A C R O S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
#define IOCF8 0xCF8
|
||||
#define IOCFC 0xCFC
|
||||
|
||||
// Reg Values for ReadCpuReg and WriteCpuReg
|
||||
#define CR0_REG 0x00
|
||||
#define CR4_REG 0x04
|
||||
#define DR0_REG 0x10
|
||||
#define DR1_REG 0x11
|
||||
#define DR2_REG 0x12
|
||||
#define DR3_REG 0x13
|
||||
#define DR7_REG 0x17
|
||||
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* T Y P E D E F S A N D S T R U C T U R E S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* P R O T O T Y P E S O F L O C A L F U N C T I O N S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* E X P O R T E D F U N C T I O N S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#if !defined __GNUC__
|
||||
// PROTOTYPES FOR amdlib32.asm
|
||||
void _mm_stream_si128_fs (void *__A, void *__B);
|
||||
void _mm_store_si128_fs (void *dest, void *data);
|
||||
void _mm_clflush_fs (void *address32);
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------------------
|
||||
* L O C A L F U N C T I O N S
|
||||
*---------------------------------------------------------------------------------------
|
||||
*/
|
||||
UINT8
|
||||
ReadIo8 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
ReadIo16 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
ReadIo32 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo8 (
|
||||
IN UINT16 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo16 (
|
||||
IN UINT16 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo32 (
|
||||
IN UINT16 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT8
|
||||
Read64Mem8 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
Read64Mem16 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
Read64Mem32 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem8 (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem16 (
|
||||
IN UINT64 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem32 (
|
||||
IN UINT64 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT64
|
||||
ReadTSC (
|
||||
VOID
|
||||
);
|
||||
|
||||
// MSR
|
||||
VOID
|
||||
LibAmdMsrRead (
|
||||
IN UINT32 MsrAddress,
|
||||
OUT UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMsrWrite (
|
||||
IN UINT32 MsrAddress,
|
||||
IN UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// IO
|
||||
VOID
|
||||
LibAmdIoRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Memory or MMIO
|
||||
VOID
|
||||
LibAmdMemRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// PCI
|
||||
VOID
|
||||
LibAmdPciRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciReadBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
OUT UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWriteBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
IN CONST UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciFindNextCap (
|
||||
IN OUT PCI_ADDR *Address,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// CPUID
|
||||
VOID
|
||||
LibAmdCpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Utility Functions
|
||||
VOID
|
||||
LibAmdMemFill (
|
||||
IN VOID *Destination,
|
||||
IN UINT8 Value,
|
||||
IN UINTN FillLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemCopy (
|
||||
IN VOID *Destination,
|
||||
IN CONST VOID *Source,
|
||||
IN UINTN CopyLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT32
|
||||
LibAmdGetPackageType (
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT8
|
||||
LibAmdBitScanReverse (
|
||||
IN UINT32 value
|
||||
);
|
||||
UINT8
|
||||
LibAmdBitScanForward (
|
||||
IN UINT32 value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdReadCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
OUT UINT32 *Value
|
||||
);
|
||||
VOID
|
||||
LibAmdWriteCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
IN UINT32 Value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdWriteBackInvalidateCache (
|
||||
IN VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdSimNowEnterDebugger (VOID);
|
||||
|
||||
VOID
|
||||
LibAmdHDTBreakPoint (VOID);
|
||||
|
||||
UINT8
|
||||
LibAmdAccessWidth (
|
||||
IN ACCESS_WIDTH AccessWidth
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdCLFlush (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Count
|
||||
);
|
||||
|
||||
VOID F10RevDProbeFilterCritical (
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN UINT32 PciRegister
|
||||
);
|
||||
VOID
|
||||
IdsOutPort (
|
||||
IN UINT32 Addr,
|
||||
IN UINT32 Value,
|
||||
IN UINT32 Flag
|
||||
);
|
||||
|
||||
VOID
|
||||
StopHere (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
CpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value
|
||||
);
|
||||
|
||||
UINT8
|
||||
ReadNumberOfCpuCores(
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif // _AMD_LIB_H_
|
||||
@ -91,7 +91,6 @@ CPPFLAGS_x86_64 += $(AGESA_INC)
|
||||
libagesa-y += Legacy/Proc/agesaCallouts.c
|
||||
libagesa-y += Legacy/Proc/Dispatcher.c
|
||||
libagesa-y += Legacy/Proc/hobTransfer.c
|
||||
libagesa-y += Lib/amdlib.c
|
||||
libagesa-y += Proc/Common/AmdInitEarly.c
|
||||
libagesa-y += Proc/Common/AmdInitEnv.c
|
||||
libagesa-y += Proc/Common/AmdInitLate.c
|
||||
|
||||
@ -1,408 +0,0 @@
|
||||
/* $NoKeywords:$ */
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* AMD Library
|
||||
*
|
||||
* Contains interface to the AMD AGESA library
|
||||
*
|
||||
* @xrefitem bom "File Content Label" "Release Content"
|
||||
* @e project: AGESA
|
||||
* @e sub-project: Lib
|
||||
* @e \$Revision: 34897 $ @e \$Date: 2010-07-14 10:07:10 +0800 (Wed, 14 Jul 2010) $
|
||||
*
|
||||
*/
|
||||
/*
|
||||
*****************************************************************************
|
||||
*
|
||||
* Copyright (c) 2011, Advanced Micro Devices, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* ***************************************************************************
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _AMD_LIB_H_
|
||||
#define _AMD_LIB_H_
|
||||
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* D E F I N I T I O N S A N D M A C R O S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
#define IOCF8 0xCF8
|
||||
#define IOCFC 0xCFC
|
||||
|
||||
// Reg Values for ReadCpuReg and WriteCpuReg
|
||||
#define CR0_REG 0x00
|
||||
#define CR4_REG 0x04
|
||||
#define DR0_REG 0x10
|
||||
#define DR1_REG 0x11
|
||||
#define DR2_REG 0x12
|
||||
#define DR3_REG 0x13
|
||||
#define DR7_REG 0x17
|
||||
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* T Y P E D E F S A N D S T R U C T U R E S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* P R O T O T Y P E S O F L O C A L F U N C T I O N S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
|
||||
/*----------------------------------------------------------------------------------------
|
||||
* E X P O R T E D F U N C T I O N S
|
||||
*----------------------------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#if !defined __GNUC__
|
||||
// PROTOTYPES FOR amdlib32.asm
|
||||
void _mm_stream_si128_fs (void *__A, void *__B);
|
||||
void _mm_store_si128_fs (void *dest, void *data);
|
||||
void _mm_clflush_fs (void *address32);
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------------------
|
||||
* L O C A L F U N C T I O N S
|
||||
*---------------------------------------------------------------------------------------
|
||||
*/
|
||||
UINT8
|
||||
ReadIo8 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
ReadIo16 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
ReadIo32 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo8 (
|
||||
IN UINT16 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo16 (
|
||||
IN UINT16 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo32 (
|
||||
IN UINT16 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT8
|
||||
Read64Mem8 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
Read64Mem16 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
Read64Mem32 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem8 (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem16 (
|
||||
IN UINT64 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem32 (
|
||||
IN UINT64 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT64
|
||||
ReadTSC (
|
||||
VOID
|
||||
);
|
||||
|
||||
// MSR
|
||||
VOID
|
||||
LibAmdMsrRead (
|
||||
IN UINT32 MsrAddress,
|
||||
OUT UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMsrWrite (
|
||||
IN UINT32 MsrAddress,
|
||||
IN UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// IO
|
||||
VOID
|
||||
LibAmdIoRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Memory or MMIO
|
||||
VOID
|
||||
LibAmdMemRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// PCI
|
||||
VOID
|
||||
LibAmdPciRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciReadBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
OUT UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWriteBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
IN CONST UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciFindNextCap (
|
||||
IN OUT PCI_ADDR *Address,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// CPUID
|
||||
VOID
|
||||
LibAmdCpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Utility Functions
|
||||
VOID
|
||||
LibAmdMemFill (
|
||||
IN VOID *Destination,
|
||||
IN UINT8 Value,
|
||||
IN UINTN FillLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemCopy (
|
||||
IN VOID *Destination,
|
||||
IN CONST VOID *Source,
|
||||
IN UINTN CopyLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT32
|
||||
LibAmdGetPackageType (
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT8
|
||||
LibAmdBitScanReverse (
|
||||
IN UINT32 value
|
||||
);
|
||||
UINT8
|
||||
LibAmdBitScanForward (
|
||||
IN UINT32 value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdReadCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
OUT UINT32 *Value
|
||||
);
|
||||
VOID
|
||||
LibAmdWriteCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
IN UINT32 Value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdWriteBackInvalidateCache (
|
||||
IN VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdSimNowEnterDebugger (VOID);
|
||||
|
||||
VOID
|
||||
LibAmdHDTBreakPoint (VOID);
|
||||
|
||||
UINT8
|
||||
LibAmdAccessWidth (
|
||||
IN ACCESS_WIDTH AccessWidth
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdCLFlush (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Count
|
||||
);
|
||||
|
||||
VOID F10RevDProbeFilterCritical (
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN UINT32 PciRegister
|
||||
);
|
||||
VOID
|
||||
IdsOutPort (
|
||||
IN UINT32 Addr,
|
||||
IN UINT32 Value,
|
||||
IN UINT32 Flag
|
||||
);
|
||||
|
||||
VOID
|
||||
StopHere (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
CpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value
|
||||
);
|
||||
|
||||
UINT8
|
||||
ReadNumberOfCpuCores(
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif // _AMD_LIB_H_
|
||||
@ -190,7 +190,6 @@ libagesa-y += Proc/CPU/Family/0x14/cpuF14Utilities.c
|
||||
libagesa-y += Proc/HT/htInterface.c
|
||||
libagesa-y += Proc/GNB/Gfx/GfxStrapsInit.c
|
||||
libagesa-y += Proc/GNB/Nb/NbInitAtEarly.c
|
||||
libagesa-y += Lib/amdlib.c
|
||||
libagesa-y += Proc/CPU/Feature/cpuCacheFlushOnHalt.c
|
||||
libagesa-y += Proc/CPU/Feature/cpuCpb.c
|
||||
libagesa-y += Proc/Mem/Main/minit.c
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,390 +0,0 @@
|
||||
/* $NoKeywords:$ */
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* AMD Library
|
||||
*
|
||||
* Contains interface to the AMD AGESA library
|
||||
*
|
||||
* @xrefitem bom "File Content Label" "Release Content"
|
||||
* @e project: AGESA
|
||||
* @e sub-project: Lib
|
||||
* @e \$Revision: 44324 $ @e \$Date: 2010-12-22 02:16:51 -0700 (Wed, 22 Dec 2010) $
|
||||
*
|
||||
*/
|
||||
/*
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (C) 2012 Advanced Micro Devices, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
******************************************************************************
|
||||
**/
|
||||
|
||||
#ifndef _AMD_LIB_H_
|
||||
#define _AMD_LIB_H_
|
||||
|
||||
#define IOCF8 0xCF8
|
||||
#define IOCFC 0xCFC
|
||||
|
||||
// Reg Values for ReadCpuReg and WriteCpuReg
|
||||
#define CR4_REG 0x04
|
||||
#define DR0_REG 0x10
|
||||
#define DR1_REG 0x11
|
||||
#define DR2_REG 0x12
|
||||
#define DR3_REG 0x13
|
||||
#define DR7_REG 0x17
|
||||
|
||||
// PROTOTYPES FOR amdlib32.asm
|
||||
UINT8
|
||||
ReadIo8 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
ReadIo16 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
ReadIo32 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo8 (
|
||||
IN UINT16 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo16 (
|
||||
IN UINT16 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo32 (
|
||||
IN UINT16 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT8
|
||||
Read64Mem8 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
Read64Mem16 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
Read64Mem32 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem8 (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem16 (
|
||||
IN UINT64 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem32 (
|
||||
IN UINT64 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT64
|
||||
ReadTSC (
|
||||
VOID
|
||||
);
|
||||
|
||||
// MSR
|
||||
|
||||
UINT64
|
||||
MsrRead (
|
||||
IN UINT32 MsrAddress
|
||||
);
|
||||
|
||||
VOID
|
||||
MsrWrite (
|
||||
IN UINT32 MsrAddress,
|
||||
IN UINT64 Value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMsrRead (
|
||||
IN UINT32 MsrAddress,
|
||||
OUT UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMsrWrite (
|
||||
IN UINT32 MsrAddress,
|
||||
IN UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// IO
|
||||
VOID
|
||||
LibAmdIoRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Memory or MMIO
|
||||
VOID
|
||||
LibAmdMemRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// PCI
|
||||
VOID
|
||||
LibAmdPciRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN VOID *Data,
|
||||
IN VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciReadBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
OUT UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWriteBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
IN UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciFindNextCap (
|
||||
IN OUT PCI_ADDR *Address,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// CPUID
|
||||
VOID
|
||||
LibAmdCpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Utility Functions
|
||||
VOID
|
||||
LibAmdMemFill (
|
||||
IN VOID *Destination,
|
||||
IN UINT8 Value,
|
||||
IN UINTN FillLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemCopy (
|
||||
IN VOID *Destination,
|
||||
IN VOID *Source,
|
||||
IN UINTN CopyLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT32
|
||||
LibAmdGetPackageType (
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT8
|
||||
LibAmdBitScanReverse (
|
||||
IN UINT32 value
|
||||
);
|
||||
UINT8
|
||||
LibAmdBitScanForward (
|
||||
IN UINT32 value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdReadCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
OUT UINT32 *Value
|
||||
);
|
||||
VOID
|
||||
LibAmdWriteCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
IN UINT32 Value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdWriteBackInvalidateCache (
|
||||
IN VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdSimNowEnterDebugger (VOID);
|
||||
|
||||
VOID
|
||||
LibAmdHDTBreakPoint (VOID);
|
||||
|
||||
UINT8
|
||||
LibAmdAccessWidth (
|
||||
IN ACCESS_WIDTH AccessWidth
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdCLFlush (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Count
|
||||
);
|
||||
|
||||
VOID F10RevDProbeFilterCritical (
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN UINT32 PciRegister
|
||||
);
|
||||
VOID
|
||||
IdsOutPort (
|
||||
IN UINT32 Addr,
|
||||
IN UINT32 Value,
|
||||
IN UINT32 Flag
|
||||
);
|
||||
|
||||
VOID
|
||||
StopHere (
|
||||
VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
CpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value
|
||||
);
|
||||
|
||||
UINT8
|
||||
ReadNumberOfCpuCores(
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif // _AMD_LIB_H_
|
||||
@ -67,7 +67,6 @@ CPPFLAGS_x86_64 += $(AGESA_INC)
|
||||
libagesa-y += Legacy/Proc/agesaCallouts.c
|
||||
libagesa-y += Legacy/Proc/Dispatcher.c
|
||||
libagesa-y += Legacy/Proc/hobTransfer.c
|
||||
libagesa-y += Lib/amdlib.c
|
||||
libagesa-y += Proc/Common/AmdInitEarly.c
|
||||
libagesa-y += Proc/Common/AmdInitEnv.c
|
||||
libagesa-y += Proc/Common/AmdInitLate.c
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,358 +0,0 @@
|
||||
/* $NoKeywords:$ */
|
||||
/**
|
||||
* @file
|
||||
*
|
||||
* AMD Library
|
||||
*
|
||||
* Contains interface to the AMD AGESA library
|
||||
*
|
||||
* @xrefitem bom "File Content Label" "Release Content"
|
||||
* @e project: AGESA
|
||||
* @e sub-project: Lib
|
||||
* @e \$Revision: 63425 $ @e \$Date: 2011-12-22 11:24:10 -0600 (Thu, 22 Dec 2011) $
|
||||
*
|
||||
*/
|
||||
/*
|
||||
******************************************************************************
|
||||
*
|
||||
* Copyright (c) 2008 - 2012, Advanced Micro Devices, Inc.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Advanced Micro Devices, Inc. nor the names of
|
||||
* its contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
******************************************************************************
|
||||
**/
|
||||
|
||||
#ifndef _AMD_LIB_H_
|
||||
#define _AMD_LIB_H_
|
||||
|
||||
#define IOCF8 0xCF8
|
||||
#define IOCFC 0xCFC
|
||||
|
||||
// Reg Values for ReadCpuReg and WriteCpuReg
|
||||
#define CR4_REG 0x04
|
||||
#define DR0_REG 0x10
|
||||
#define DR1_REG 0x11
|
||||
#define DR2_REG 0x12
|
||||
#define DR3_REG 0x13
|
||||
#define DR7_REG 0x17
|
||||
|
||||
// PROTOTYPES FOR amdlib32.asm
|
||||
UINT8
|
||||
ReadIo8 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
ReadIo16 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
ReadIo32 (
|
||||
IN UINT16 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo8 (
|
||||
IN UINT16 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo16 (
|
||||
IN UINT16 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
WriteIo32 (
|
||||
IN UINT16 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT8
|
||||
Read64Mem8 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT16
|
||||
Read64Mem16 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
UINT32
|
||||
Read64Mem32 (
|
||||
IN UINT64 Address
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem8 (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem16 (
|
||||
IN UINT64 Address,
|
||||
IN UINT16 Data
|
||||
);
|
||||
|
||||
VOID
|
||||
Write64Mem32 (
|
||||
IN UINT64 Address,
|
||||
IN UINT32 Data
|
||||
);
|
||||
|
||||
UINT64
|
||||
ReadTSC (
|
||||
VOID);
|
||||
|
||||
// MSR
|
||||
VOID
|
||||
LibAmdMsrRead (
|
||||
IN UINT32 MsrAddress,
|
||||
OUT UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMsrWrite (
|
||||
IN UINT32 MsrAddress,
|
||||
IN UINT64 *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// IO
|
||||
VOID
|
||||
LibAmdIoRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdIoPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT16 IoAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Memory or MMIO
|
||||
VOID
|
||||
LibAmdMemRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN UINT64 MemAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// PCI
|
||||
VOID
|
||||
LibAmdPciRead (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
OUT VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWrite (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciRMW (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciPoll (
|
||||
IN ACCESS_WIDTH AccessWidth,
|
||||
IN PCI_ADDR PciAddress,
|
||||
IN CONST VOID *Data,
|
||||
IN CONST VOID *DataMask,
|
||||
IN UINT64 Delay,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciReadBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
OUT UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciWriteBits (
|
||||
IN PCI_ADDR Address,
|
||||
IN UINT8 Highbit,
|
||||
IN UINT8 Lowbit,
|
||||
IN CONST UINT32 *Value,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdPciFindNextCap (
|
||||
IN OUT PCI_ADDR *Address,
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// CPUID
|
||||
VOID
|
||||
LibAmdCpuidRead (
|
||||
IN UINT32 CpuidFcnAddress,
|
||||
OUT CPUID_DATA *Value,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
// Utility Functions
|
||||
VOID
|
||||
LibAmdMemFill (
|
||||
IN VOID *Destination,
|
||||
IN UINT8 Value,
|
||||
IN UINTN FillLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdMemCopy (
|
||||
IN VOID *Destination,
|
||||
IN CONST VOID *Source,
|
||||
IN UINTN CopyLength,
|
||||
IN OUT AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT32
|
||||
LibAmdGetPackageType (
|
||||
IN AMD_CONFIG_PARAMS *StdHeader
|
||||
);
|
||||
|
||||
UINT8
|
||||
LibAmdBitScanReverse (
|
||||
IN UINT32 value
|
||||
);
|
||||
UINT8
|
||||
LibAmdBitScanForward (
|
||||
IN UINT32 value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdReadCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
OUT UINT32 *Value
|
||||
);
|
||||
VOID
|
||||
LibAmdWriteCpuReg (
|
||||
IN UINT8 RegNum,
|
||||
IN UINT32 Value
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdWriteBackInvalidateCache (
|
||||
IN VOID
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdSimNowEnterDebugger (VOID);
|
||||
|
||||
VOID
|
||||
LibAmdHDTBreakPoint (VOID);
|
||||
|
||||
UINT8
|
||||
LibAmdAccessWidth (
|
||||
IN ACCESS_WIDTH AccessWidth
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdCLFlush (
|
||||
IN UINT64 Address,
|
||||
IN UINT8 Count
|
||||
);
|
||||
|
||||
VOID
|
||||
LibAmdFinit (
|
||||
VOID);
|
||||
|
||||
VOID
|
||||
StopHere (
|
||||
VOID
|
||||
);
|
||||
|
||||
#endif // _AMD_LIB_H_
|
||||
@ -88,7 +88,6 @@ CPPFLAGS_x86_64 += $(AGESA_INC)
|
||||
libagesa-y += Legacy/Proc/Dispatcher.c
|
||||
libagesa-y += Legacy/Proc/agesaCallouts.c
|
||||
libagesa-y += Legacy/Proc/hobTransfer.c
|
||||
libagesa-y += Lib/amdlib.c
|
||||
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnC6State.c
|
||||
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnCpb.c
|
||||
libagesa-y += Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c
|
||||
|
||||
@ -106,7 +106,7 @@
|
||||
#endif
|
||||
|
||||
#include "Fch.h"
|
||||
#include <Lib/amdlib.h>
|
||||
#include "amdlib.h"
|
||||
#include "Common/FchCommonCfg.h"
|
||||
#include "Common/AcpiLib.h"
|
||||
#include "Common/FchDef.h"
|
||||
|
||||
@ -930,3 +930,12 @@ IdsLibDataMaskSet32 (
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
IdsOutPort (
|
||||
IN UINT32 Addr,
|
||||
IN UINT32 Value,
|
||||
IN UINT32 Flag
|
||||
)
|
||||
{
|
||||
__outdword ((UINT16) Addr, Value);
|
||||
}
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -94,7 +94,6 @@ CPPFLAGS_x86_64 += $(AGESA_INC)
|
||||
libagesa-y += Legacy/Proc/agesaCallouts.c
|
||||
libagesa-y += Legacy/Proc/Dispatcher.c
|
||||
libagesa-y += Legacy/Proc/hobTransfer.c
|
||||
libagesa-y += Lib/amdlib.c
|
||||
libagesa-y += Proc/Common/AmdInitEarly.c
|
||||
libagesa-y += Proc/Common/AmdInitEnv.c
|
||||
libagesa-y += Proc/Common/AmdInitLate.c
|
||||
|
||||
@ -1013,3 +1013,12 @@ IdsLibDataMaskSet32 (
|
||||
|
||||
|
||||
|
||||
VOID
|
||||
IdsOutPort (
|
||||
IN UINT32 Addr,
|
||||
IN UINT32 Value,
|
||||
IN UINT32 Flag
|
||||
)
|
||||
{
|
||||
__outdword ((UINT16) Addr, Value);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user