From 084e54522acb412187b5ff10ee286ab18867e18b Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Mon, 27 Sep 2021 08:16:38 -0600 Subject: [PATCH] soc/intel: Add Cometlake-H/S Q0 (10+2) CPU Change-Id: Id1da42aa93ab3440ae743d943a00713b7df3f453 --- src/include/cpu/intel/cpu_ids.h | 3 ++- src/soc/intel/cannonlake/bootblock/report_platform.c | 3 ++- src/soc/intel/common/block/cpu/mp_init.c | 3 ++- 3 files changed, 6 insertions(+), 3 deletions(-) diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h index 53140762d4..7d3c715b53 100644 --- a/src/include/cpu/intel/cpu_ids.h +++ b/src/include/cpu/intel/cpu_ids.h @@ -44,7 +44,8 @@ #define CPUID_COMETLAKE_H_S_6_2_G0 0xa0650 #define CPUID_COMETLAKE_H_S_6_2_G1 0xa0653 #define CPUID_COMETLAKE_H_S_10_2_P0 0xa0651 -#define CPUID_COMETLAKE_H_S_10_2_Q0_P1 0xa0654 +#define CPUID_COMETLAKE_H_S_10_2_P1 0xa0654 +#define CPUID_COMETLAKE_H_S_10_2_Q0 0xa0655 #define CPUID_TIGERLAKE_A0 0x806c0 #define CPUID_TIGERLAKE_B0 0x806c1 #define CPUID_TIGERLAKE_R0 0x806d1 diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c index fed8ac2199..bc39dacb0a 100644 --- a/src/soc/intel/cannonlake/bootblock/report_platform.c +++ b/src/soc/intel/cannonlake/bootblock/report_platform.c @@ -33,7 +33,8 @@ static struct { { CPUID_COMETLAKE_H_S_6_2_G0, "Cometlake-H/S G0 (6+2)" }, { CPUID_COMETLAKE_H_S_6_2_G1, "Cometlake-H/S G1 (6+2)" }, { CPUID_COMETLAKE_H_S_10_2_P0, "Cometlake-H/S P0 (10+2)" }, - { CPUID_COMETLAKE_H_S_10_2_Q0_P1, "Cometlake-H/S Q0/P1 (10+2)" }, + { CPUID_COMETLAKE_H_S_10_2_P1, "Cometlake-H/S P1 (10+2)" }, + { CPUID_COMETLAKE_H_S_10_2_Q0, "Cometlake-H/S Q0 (10+2)" }, }; static struct { diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index acd15a8f2c..4710eb76a3 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -60,7 +60,8 @@ static const struct cpu_device_id cpu_table[] = { { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G0 }, { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_6_2_G1 }, { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P0 }, - { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0_P1 }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_P1 }, + { X86_VENDOR_INTEL, CPUID_COMETLAKE_H_S_10_2_Q0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_A0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_B0 }, { X86_VENDOR_INTEL, CPUID_TIGERLAKE_R0 },