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baytrail: Add IOSF functions for USBPHY and USHPHY

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These are needed for USB2 and USB3 PHY init sequences.

BUG=chrome-os-partner:23635
BRANCH=rambi
TEST=emerge-rambi chromeos-coreboot-rambi

Change-Id: Id284d882034e15eceeaa910b8b73bc0d8d895199
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/175227
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4916
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Duncan Laurie
2013-10-31 08:20:48 -07:00
committed by Aaron Durbin
parent 5d53554d41
commit 0854c84735
2 changed files with 51 additions and 0 deletions
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44
src/soc/intel/baytrail/iosf.c
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@@ -121,3 +121,47 @@ void iosf_punit_write(int reg, uint32_t val)
write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
write_iosf_reg(MCR_REG, cr);
}
uint32_t iosf_usbphy_read(int reg)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_USBPHY) |
IOSF_PORT(IOSF_PORT_USBPHY) | IOSF_REG(reg) |
IOSF_BYTE_EN;
write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
write_iosf_reg(MCR_REG, cr);
return read_iosf_reg(MDR_REG);
}
void iosf_usbphy_write(int reg, uint32_t val)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_USBPHY) |
IOSF_PORT(IOSF_PORT_USBPHY) | IOSF_REG(reg) |
IOSF_BYTE_EN;
write_iosf_reg(MDR_REG, val);
write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
write_iosf_reg(MCR_REG, cr);
}
uint32_t iosf_ushphy_read(int reg)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_READ_USHPHY) |
IOSF_PORT(IOSF_PORT_USHPHY) | IOSF_REG(reg) |
IOSF_BYTE_EN;
write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
write_iosf_reg(MCR_REG, cr);
return read_iosf_reg(MDR_REG);
}
void iosf_ushphy_write(int reg, uint32_t val)
{
uint32_t cr = IOSF_OPCODE(IOSF_OP_WRITE_USHPHY) |
IOSF_PORT(IOSF_PORT_USHPHY) | IOSF_REG(reg) |
IOSF_BYTE_EN;
write_iosf_reg(MDR_REG, val);
write_iosf_reg(MCRX_REG, IOSF_REG_UPPER(reg));
write_iosf_reg(MCR_REG, cr);
}