sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

This patch unifies the use of config options in v2 to all start with CONFIG_

Browse Source 
It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2009-06-30 15:17:49 +00:00
committed by Stefan Reinauer
parent 9702b6bf7e
commit 0867062412
863 changed files with 14632 additions and 14632 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
src/arch/ppc/lib/pci_dev.c
View File

@@ -9,8 +9,8 @@ uint8_t pci_ppc_read_config8(unsigned char bus, int devfn, int where)
{
uint8_t res;
out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
res = in_8((unsigned char *)PCIC0_CFGDATA + (where & 3));
out_le32((unsigned *)CONFIG_PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
res = in_8((unsigned char *)CONFIG_PCIC0_CFGDATA + (where & 3));
return res;
}
@@ -18,8 +18,8 @@ uint16_t pci_ppc_read_config16(unsigned char bus, int devfn, int where)
{
uint16_t res;
out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
res = in_le16((unsigned short *)PCIC0_CFGDATA + (where & 2));
out_le32((unsigned *)CONFIG_PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
res = in_le16((unsigned short *)CONFIG_PCIC0_CFGDATA + (where & 2));
return res;
}
@@ -27,28 +27,28 @@ uint32_t pci_ppc_read_config32(unsigned char bus, int devfn, int where)
{
uint32_t res;
out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
res = in_le32((unsigned *)PCIC0_CFGDATA);
out_le32((unsigned *)CONFIG_PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
res = in_le32((unsigned *)CONFIG_PCIC0_CFGDATA);
return res;
}
int pci_ppc_write_config8(unsigned char bus, int devfn, int where, uint8_t data)
{
out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
out_8((unsigned char *)PCIC0_CFGDATA + (where & 3), data);
out_le32((unsigned *)CONFIG_PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
out_8((unsigned char *)CONFIG_PCIC0_CFGDATA + (where & 3), data);
return 0;
}
int pci_ppc_write_config16(unsigned char bus, int devfn, int where, uint16_t data)
{
out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
out_le16((unsigned short *)PCIC0_CFGDATA + (where & 2), data);
out_le32((unsigned *)CONFIG_PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
out_le16((unsigned short *)CONFIG_PCIC0_CFGDATA + (where & 2), data);
return 0;
}
int pci_ppc_write_config32(unsigned char bus, int devfn, int where, uint32_t data)
{
out_le32((unsigned *)PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
out_le32((unsigned *)PCIC0_CFGDATA, data);
out_le32((unsigned *)CONFIG_PCIC0_CFGADDR, CONFIG_CMD(bus, devfn, where));
out_le32((unsigned *)CONFIG_PCIC0_CFGDATA, data);
return 0;
}