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This patch unifies the use of config options in v2 to all start with CONFIG_

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It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2009-06-30 15:17:49 +00:00
committed by Stefan Reinauer
parent 9702b6bf7e
commit 0867062412
863 changed files with 14632 additions and 14632 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
src/devices/device_util.c
View File

@@ -163,7 +163,7 @@ const char *dev_path(device_t dev)
memcpy(buffer, "Root Device", 12);
break;
case DEVICE_PATH_PCI:
#if PCI_BUS_SEGN_BITS
#if CONFIG_PCI_BUS_SEGN_BITS
sprintf(buffer, "PCI: %04x:%02x:%02x.%01x",
dev->bus->secondary>>8, dev->bus->secondary & 0xff,
PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn));
@@ -461,7 +461,7 @@ void report_resource_stored(device_t dev, struct resource *resource, const char
end = resource_end(resource);
buf[0] = '\0';
if (resource->flags & IORESOURCE_PCI_BRIDGE) {
#if PCI_BUS_SEGN_BITS
#if CONFIG_PCI_BUS_SEGN_BITS
sprintf(buf, "bus %04x:%02x ", dev->bus->secondary>>8, dev->link[0].secondary & 0xff);
#else
sprintf(buf, "bus %02x ", dev->link[0].secondary);
@@ -662,7 +662,7 @@ void show_one_resource(int debug_level, struct device *dev,
buf[0] = '\0';
/*
if (resource->flags & IORESOURCE_BRIDGE) {
#if PCI_BUS_SEGN_BITS
#if CONFIG_PCI_BUS_SEGN_BITS
sprintf(buf, "bus %04x:%02x ", dev->bus->secondary >> 8,
dev->link[0].secondary & 0xff);
#else

34
src/devices/hypertransport.c
View File

@@ -103,8 +103,8 @@ static unsigned ht_read_freq_cap(device_t dev, unsigned pos)
}
/* AMD K8 Unsupported 1Ghz? */
if ((dev->vendor == PCI_VENDOR_ID_AMD) && (dev->device == 0x1100)) {
#if K8_HT_FREQ_1G_SUPPORT == 1
#if K8_REV_F_SUPPORT == 0
#if CONFIG_K8_HT_FREQ_1G_SUPPORT == 1
#if CONFIG_K8_REV_F_SUPPORT == 0
if (is_cpu_pre_e0()) { // only e0 later suupport 1GHz HT
freq_cap &= ~(1 << HT_FREQ_1000Mhz);
}
@@ -326,14 +326,14 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
} while((ctrl & (1 << 5)) == 0);
//actually, only for one HT device HT chain, and unitid is 0
#if HT_CHAIN_UNITID_BASE == 0
#if CONFIG_HT_CHAIN_UNITID_BASE == 0
if(offset_unitid) {
return;
}
#endif
/* Check if is already collapsed */
if((!offset_unitid)|| (offset_unitid && (!((HT_CHAIN_END_UNITID_BASE == 0) && (HT_CHAIN_END_UNITID_BASE <HT_CHAIN_UNITID_BASE))))) {
if((!offset_unitid)|| (offset_unitid && (!((CONFIG_HT_CHAIN_END_UNITID_BASE == 0) && (CONFIG_HT_CHAIN_END_UNITID_BASE <CONFIG_HT_CHAIN_UNITID_BASE))))) {
struct device dummy;
uint32_t id;
dummy.bus = bus;
@@ -381,17 +381,17 @@ static void ht_collapse_early_enumeration(struct bus *bus, unsigned offset_uniti
unsigned int hypertransport_scan_chain(struct bus *bus,
unsigned min_devfn, unsigned max_devfn, unsigned int max, unsigned *ht_unitid_base, unsigned offset_unitid)
{
//even HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
//even CONFIG_HT_CHAIN_UNITID_BASE == 0, we still can go through this function, because of end_of_chain check, also We need it to optimize link
unsigned next_unitid, last_unitid;
device_t old_devices, dev, func;
unsigned min_unitid = (offset_unitid) ? HT_CHAIN_UNITID_BASE:1;
unsigned min_unitid = (offset_unitid) ? CONFIG_HT_CHAIN_UNITID_BASE:1;
struct ht_link prev;
device_t last_func = 0;
int ht_dev_num = 0;
unsigned max_unitid;
#if HT_CHAIN_END_UNITID_BASE != 0x20
//let't record the device of last ht device, So we can set the Unitid to HT_CHAIN_END_UNITID_BASE
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
//let't record the device of last ht device, So we can set the Unitid to CONFIG_HT_CHAIN_END_UNITID_BASE
unsigned real_last_unitid;
uint8_t real_last_pos;
device_t real_last_dev;
@@ -483,11 +483,11 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
flags &= ~0x1f; /* mask out base Unit ID */
count = (flags >> 5) & 0x1f; /* get unit count */
#if HT_CHAIN_END_UNITID_BASE != 0x20
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
if(offset_unitid) {
if(next_unitid > (max_devfn>>3)) { // max_devfn will be (0x17<<3)|7 or (0x1f<<3)|7
if(!end_used) {
next_unitid = HT_CHAIN_END_UNITID_BASE;
next_unitid = CONFIG_HT_CHAIN_END_UNITID_BASE;
end_used = 1;
} else {
goto end_of_chain;
@@ -519,7 +519,7 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
ht_unitid_base[ht_dev_num] = next_unitid;
ht_dev_num++;
#if HT_CHAIN_END_UNITID_BASE != 0x20
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
if (offset_unitid) {
real_last_pos = pos;
real_last_unitid = next_unitid;
@@ -550,25 +550,25 @@ unsigned int hypertransport_scan_chain(struct bus *bus,
}
#endif
#if HT_CHAIN_END_UNITID_BASE != 0x20
if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != HT_CHAIN_END_UNITID_BASE) && !end_used) {
#if CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20
if(offset_unitid && (ht_dev_num>1) && (real_last_unitid != CONFIG_HT_CHAIN_END_UNITID_BASE) && !end_used) {
uint16_t flags;
int i;
device_t last_func = 0;
flags = pci_read_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS);
flags &= ~0x1f;
flags |= HT_CHAIN_END_UNITID_BASE & 0x1f;
flags |= CONFIG_HT_CHAIN_END_UNITID_BASE & 0x1f;
pci_write_config16(real_last_dev, real_last_pos + PCI_CAP_FLAGS, flags);
for(func = real_last_dev; func; func = func->sibling) {
func->path.pci.devfn -= ((real_last_unitid - HT_CHAIN_END_UNITID_BASE) << 3);
func->path.pci.devfn -= ((real_last_unitid - CONFIG_HT_CHAIN_END_UNITID_BASE) << 3);
last_func = func;
}
ht_unitid_base[ht_dev_num-1] = HT_CHAIN_END_UNITID_BASE; // update last one
ht_unitid_base[ht_dev_num-1] = CONFIG_HT_CHAIN_END_UNITID_BASE; // update last one
printk_debug(" unitid: %04x --> %04x\n",
real_last_unitid, HT_CHAIN_END_UNITID_BASE);
real_last_unitid, CONFIG_HT_CHAIN_END_UNITID_BASE);
}
#endif

10
src/devices/pci_device.c
View File

@@ -598,11 +598,11 @@ void pci_dev_enable_resources(struct device *dev)
if (dev->on_mainboard && ops && ops->set_subsystem) {
printk_debug("%s subsystem <- %02x/%02x\n",
dev_path(dev),
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
ops->set_subsystem(dev,
MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID,
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID);
}
command = pci_read_config16(dev, PCI_COMMAND);
command |= dev->command;
@@ -1034,7 +1034,7 @@ unsigned int pci_scan_bus(struct bus *bus,
device_t old_devices;
device_t child;
#if PCI_BUS_SEGN_BITS
#if CONFIG_PCI_BUS_SEGN_BITS
printk_debug("PCI: pci_scan_bus for bus %04x:%02x\n", bus->secondary >> 8, bus->secondary & 0xff);
#else
printk_debug("PCI: pci_scan_bus for bus %02x\n", bus->secondary);

2
src/devices/pci_ops.c
View File

@@ -86,7 +86,7 @@ void pci_write_config32(device_t dev, unsigned where, uint32_t val)
ops_pci_bus(pbus)->write32(pbus, dev->bus->secondary, dev->path.pci.devfn, where, val);
}
#if MMCONF_SUPPORT
#if CONFIG_MMCONF_SUPPORT
uint8_t pci_mmio_read_config8(device_t dev, unsigned where)
{
struct bus *pbus = get_pbus(dev);