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This patch unifies the use of config options in v2 to all start with CONFIG_

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It's basically done with the following script and some manual fixup:

VARS=`grep ^define src/config/Options.lb | cut -f2 -d\ | grep -v ^CONFIG | grep -v ^COREBOOT |grep -v ^CC`
for VAR in $VARS; do
	find . -name .svn -prune -o -type f -exec perl -pi -e "s/(^|[^0-9a-zA-Z_]+)$VAR($|[^0-9a-zA-Z_]+)/\1CONFIG_$VAR\2/g" {} \;
done

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
2009-06-30 15:17:49 +00:00
committed by Stefan Reinauer
parent 9702b6bf7e
commit 0867062412
863 changed files with 14632 additions and 14632 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
src/pc80/mc146818rtc.c
View File

@@ -138,7 +138,7 @@ void rtc_init(int invalid)
printk_debug("RTC Init\n");
#if HAVE_OPTION_TABLE
#if CONFIG_HAVE_OPTION_TABLE
/* See if there has been a CMOS power problem. */
x = cmos_read(RTC_VALID);
cmos_invalid = !(x & RTC_VRT);
@@ -179,10 +179,10 @@ void rtc_init(int invalid)
/* Setup the frequency it operates at */
cmos_write(RTC_FREQ_SELECT_DEFAULT, RTC_FREQ_SELECT);
#if HAVE_OPTION_TABLE
#if CONFIG_HAVE_OPTION_TABLE
/* See if there is a LB CMOS checksum error */
checksum_invalid = !rtc_checksum_valid(LB_CKS_RANGE_START,
LB_CKS_RANGE_END,LB_CKS_LOC);
checksum_invalid = !rtc_checksum_valid(CONFIG_LB_CKS_RANGE_START,
CONFIG_LB_CKS_RANGE_END,CONFIG_LB_CKS_LOC);
if(checksum_invalid)
printk_debug("Invalid CMOS LB checksum\n");
@@ -196,7 +196,7 @@ void rtc_init(int invalid)
}
#if USE_OPTION_TABLE == 1
#if CONFIG_USE_OPTION_TABLE == 1
/* This routine returns the value of the requested bits
input bit = bit count from the beginning of the cmos image
length = number of bits to include in the value
@@ -259,9 +259,9 @@ int get_option(void *dest, char *name)
if(get_cmos_value(ce->bit, ce->length, dest))
return(-3);
if(!rtc_checksum_valid(LB_CKS_RANGE_START,
LB_CKS_RANGE_END,LB_CKS_LOC))
if(!rtc_checksum_valid(CONFIG_LB_CKS_RANGE_START,
CONFIG_LB_CKS_RANGE_END,CONFIG_LB_CKS_LOC))
return(-4);
return(0);
}
#endif /* USE_OPTION_TABLE */
#endif /* CONFIG_USE_OPTION_TABLE */

22
src/pc80/mc146818rtc_early.c
View File

@@ -1,11 +1,11 @@
#include <pc80/mc146818rtc.h>
#include <part/fallback_boot.h>
#ifndef MAX_REBOOT_CNT
#error "MAX_REBOOT_CNT not defined"
#ifndef CONFIG_MAX_REBOOT_CNT
#error "CONFIG_MAX_REBOOT_CNT not defined"
#endif
#if MAX_REBOOT_CNT > 15
#error "MAX_REBOOT_CNT too high"
#if CONFIG_MAX_REBOOT_CNT > 15
#error "CONFIG_MAX_REBOOT_CNT too high"
#endif
static unsigned char cmos_read(unsigned char addr)
@@ -44,14 +44,14 @@ static int cmos_chksum_valid(void)
unsigned long sum, old_sum;
sum = 0;
/* Comput the cmos checksum */
for(addr = LB_CKS_RANGE_START; addr <= LB_CKS_RANGE_END; addr++) {
for(addr = CONFIG_LB_CKS_RANGE_START; addr <= CONFIG_LB_CKS_RANGE_END; addr++) {
sum += cmos_read(addr);
}
sum = (sum & 0xffff) ^ 0xffff;
/* Read the stored checksum */
old_sum = cmos_read(LB_CKS_LOC) << 8;
old_sum |= cmos_read(LB_CKS_LOC+1);
old_sum = cmos_read(CONFIG_LB_CKS_LOC) << 8;
old_sum |= cmos_read(CONFIG_LB_CKS_LOC+1);
return sum == old_sum;
}
@@ -75,7 +75,7 @@ static int do_normal_boot(void)
*/
byte = cmos_read(RTC_BOOT_BYTE);
byte &= 0x0c;
byte |= MAX_REBOOT_CNT << 4;
byte |= CONFIG_MAX_REBOOT_CNT << 4;
cmos_write(byte, RTC_BOOT_BYTE);
}
@@ -89,12 +89,12 @@ static int do_normal_boot(void)
/* Properly set the last boot flag */
byte &= 0xfc;
if ((byte >> 4) < MAX_REBOOT_CNT) {
if ((byte >> 4) < CONFIG_MAX_REBOOT_CNT) {
byte |= (1<<1);
}
/* Are we already at the max count? */
if ((byte >> 4) < MAX_REBOOT_CNT) {
if ((byte >> 4) < CONFIG_MAX_REBOOT_CNT) {
byte += 1 << 4; /* No, add 1 to the count */
}
else {
@@ -109,7 +109,7 @@ static int do_normal_boot(void)
static unsigned read_option(unsigned start, unsigned size, unsigned def)
{
#if USE_OPTION_TABLE == 1
#if CONFIG_USE_OPTION_TABLE == 1
unsigned byte;
byte = cmos_read(start/8);
return (byte >> (start & 7U)) & ((1U << size) - 1U);

48
src/pc80/serial.c
View File

@@ -1,27 +1,27 @@
#include <part/fallback_boot.h>
/* Base Address */
#ifndef TTYS0_BASE
#define TTYS0_BASE 0x3f8
#ifndef CONFIG_TTYS0_BASE
#define CONFIG_TTYS0_BASE 0x3f8
#endif
#ifndef TTYS0_BAUD
#define TTYS0_BAUD 115200
#ifndef CONFIG_TTYS0_BAUD
#define CONFIG_TTYS0_BAUD 115200
#endif
#if ((115200%TTYS0_BAUD) != 0)
#if ((115200%CONFIG_TTYS0_BAUD) != 0)
#error Bad ttys0 baud rate
#endif
#define TTYS0_DIV (115200/TTYS0_BAUD)
#define CONFIG_TTYS0_DIV (115200/CONFIG_TTYS0_BAUD)
/* Line Control Settings */
#ifndef TTYS0_LCS
#ifndef CONFIG_TTYS0_LCS
/* Set 8bit, 1 stop bit, no parity */
#define TTYS0_LCS 0x3
#define CONFIG_TTYS0_LCS 0x3
#endif
#define UART_LCS TTYS0_LCS
#define UART_LCS CONFIG_TTYS0_LCS
#if CONFIG_USE_PRINTK_IN_CAR == 0
@@ -46,7 +46,7 @@
static int uart_can_tx_byte(void)
{
return inb(TTYS0_BASE + UART_LSR) & 0x20;
return inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x20;
}
static void uart_wait_to_tx_byte(void)
@@ -57,14 +57,14 @@ static void uart_wait_to_tx_byte(void)
static void uart_wait_until_sent(void)
{
while(!(inb(TTYS0_BASE + UART_LSR) & 0x40))
while(!(inb(CONFIG_TTYS0_BASE + UART_LSR) & 0x40))
;
}
static void uart_tx_byte(unsigned char data)
{
uart_wait_to_tx_byte();
outb(data, TTYS0_BASE + UART_TBR);
outb(data, CONFIG_TTYS0_BASE + UART_TBR);
/* Make certain the data clears the fifos */
uart_wait_until_sent();
}
@@ -72,24 +72,24 @@ static void uart_tx_byte(unsigned char data)
static void uart_init(void)
{
/* disable interrupts */
outb(0x0, TTYS0_BASE + UART_IER);
outb(0x0, CONFIG_TTYS0_BASE + UART_IER);
/* enable fifo's */
outb(0x01, TTYS0_BASE + UART_FCR);
outb(0x01, CONFIG_TTYS0_BASE + UART_FCR);
/* Set Baud Rate Divisor to 12 ==> 115200 Baud */
outb(0x80 | UART_LCS, TTYS0_BASE + UART_LCR);
#if USE_OPTION_TABLE == 1
outb(0x80 | UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
#if CONFIG_USE_OPTION_TABLE == 1
static const unsigned char divisor[] = { 1,2,3,6,12,24,48,96 };
unsigned ttys0_div, ttys0_index;
ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
ttys0_index &= 7;
ttys0_div = divisor[ttys0_index];
outb(ttys0_div & 0xff, TTYS0_BASE + UART_DLL);
outb(0, TTYS0_BASE + UART_DLM);
outb(ttys0_div & 0xff, CONFIG_TTYS0_BASE + UART_DLL);
outb(0, CONFIG_TTYS0_BASE + UART_DLM);
#else
outb(TTYS0_DIV & 0xFF, TTYS0_BASE + UART_DLL);
outb((TTYS0_DIV >> 8) & 0xFF, TTYS0_BASE + UART_DLM);
outb(CONFIG_TTYS0_DIV & 0xFF, CONFIG_TTYS0_BASE + UART_DLL);
outb((CONFIG_TTYS0_DIV >> 8) & 0xFF, CONFIG_TTYS0_BASE + UART_DLM);
#endif
outb(UART_LCS, TTYS0_BASE + UART_LCR);
outb(UART_LCS, CONFIG_TTYS0_BASE + UART_LCR);
}
#else
@@ -98,15 +98,15 @@ static void uart_init(void)
extern void uart8250_init(unsigned base_port, unsigned divisor, unsigned lcs);
void uart_init(void)
{
#if USE_OPTION_TABLE == 1
#if CONFIG_USE_OPTION_TABLE == 1
static const unsigned char divisor[] = { 1,2,3,6,12,24,48,96 };
unsigned ttys0_div, ttys0_index;
ttys0_index = read_option(CMOS_VSTART_baud_rate, CMOS_VLEN_baud_rate, 0);
ttys0_index &= 7;
ttys0_div = divisor[ttys0_index];
uart8250_init(TTYS0_BASE, ttys0_div, UART_LCS);
uart8250_init(CONFIG_TTYS0_BASE, ttys0_div, UART_LCS);
#else
uart8250_init(TTYS0_BASE, TTYS0_DIV, UART_LCS);
uart8250_init(CONFIG_TTYS0_BASE, CONFIG_TTYS0_DIV, UART_LCS);
#endif
}
#endif

4
src/pc80/usbdebug_direct_serial.c
View File

@@ -3,14 +3,14 @@
static void early_usbdebug_direct_init(void)
{
struct ehci_debug_info *dbg_info =
(struct ehci_debug_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - sizeof (struct ehci_debug_info));
(struct ehci_debug_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof (struct ehci_debug_info));
usbdebug_direct_init(EHCI_BAR, EHCI_DEBUG_OFFSET, dbg_info);
}
void usbdebug_direct_tx_byte(unsigned char data)
{
struct ehci_debug_info *dbg_info;
dbg_info = (struct ehci_debug_info *)(DCACHE_RAM_BASE + DCACHE_RAM_SIZE - sizeof (struct ehci_debug_info)); // in Cache
dbg_info = (struct ehci_debug_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - sizeof (struct ehci_debug_info)); // in Cache
if (dbg_info->ehci_debug) {
dbgp_bulk_write_x(dbg_info, &data, 1);
}