Intel Common SOC: Add romstage support

Provide a common romstage implementation for the Intel SOCs.

BRANCH=none
BUG=None
TEST=Build for Braswell

Change-Id: I80f5f8f0f36e9023117b07d4af5c806fff8157b6
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/10050
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/common/hda_verb.c

@@ -72,7 +72,7 @@ int hda_codec_detect(u8 *base)
 
 	/* Clear the "State Change Status Register" STATESTS bits
 	 * for each of the "SDIN Stat Change Status Flag"
-	*/
+	 */
 	write8(base + HDA_STATESTS_REG, 0xf);
 
 	/* Turn off the link and poll RESET# bit until it reads back as 0 */