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src/acpi to src/lib: Fix spelling errors

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These issues were found and fixed by codespell, a useful tool for
finding spelling errors.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58080
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth
2021-10-01 14:28:22 -06:00
committed by Martin Roth
parent 6c3ece9c9e
commit 0949e73906
52 changed files with 68 additions and 68 deletions
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4
src/drivers/spi/spi_sdcard.c
View File

@@ -683,7 +683,7 @@ int spi_sdcard_single_write(const struct spi_sdcard *card,
spi_sdcard_sendbyte(card, 0xff & (c >> 8));
spi_sdcard_sendbyte(card, 0xff & (c >> 0));
/* recevie and verify data response token */
/* receive and verify data response token */
c = spi_sdcard_recvbyte(card);
if ((c & CT_RESPONSE_MASK) != CT_RESPONSE_ACCEPTED) {
spi_sdcard_disable_cs(card);
@@ -742,7 +742,7 @@ int spi_sdcard_multiple_write(const struct spi_sdcard *card,
spi_sdcard_sendbyte(card, 0xff & (c >> 8));
spi_sdcard_sendbyte(card, 0xff & (c >> 0));
/* recevie and verify data response token */
/* receive and verify data response token */
c = spi_sdcard_recvbyte(card);
if ((c & CT_RESPONSE_MASK) != CT_RESPONSE_ACCEPTED)
break;

6
src/drivers/spi/tpm/tpm.c
View File

@@ -3,7 +3,7 @@
*
* It assumes that the required SPI interface has been initialized before the
* driver is started. A 'sruct spi_slave' pointer passed at initialization is
* used to direct traffic to the correct SPI interface. This dirver does not
* used to direct traffic to the correct SPI interface. This driver does not
* provide a way to instantiate multiple TPM devices. Also, to keep things
* simple, the driver unconditionally uses of TPM locality zero.
*
@@ -159,7 +159,7 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr)
/*
* The first byte of the frame header encodes the transaction type
* (read or write) and transfer size (set to lentgh - 1), limited to
* (read or write) and transfer size (set to length - 1), limited to
* 64 bytes.
*/
header.body[0] = (read_write ? 0x80 : 0) | 0x40 | (bytes - 1);
@@ -188,7 +188,7 @@ static int start_transaction(int read_write, size_t bytes, unsigned int addr)
* the last clock of the byte) is set to 1.
*
* Due to some SPI controllers' shortcomings (Rockchip comes to
* mind...) we trasmit the 4 byte header without checking the byte
* mind...) we transmit the 4 byte header without checking the byte
* transmitted by the TPM during the transaction's last byte.
*
* We know that cr50 is guaranteed to set the flow control bit to 0