src/acpi to src/lib: Fix spelling errors

These issues were found and fixed by codespell, a useful tool for
finding spelling errors.

Signed-off-by: Martin Roth <martin@coreboot.org>
Change-Id: I5b8ecdfe75d99028fee820a2034466a8ad1c5e63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58080
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Martin Roth
2021-10-01 14:28:22 -06:00
committed by Martin Roth
parent 6c3ece9c9e
commit 0949e73906
52 changed files with 68 additions and 68 deletions

View File

@@ -75,7 +75,7 @@ Device (EC0)
KBID, 1, // 0=EN KBD, 1=JP KBD ; 80h.1
, 6, // Reserved ; 80h.2-7
NPST, 8, // Number of P-State level ; 81h
MPST, 8, // Maxumum P-State ; 82h
MPST, 8, // Maximum P-State ; 82h
KWAK, 1, // Keyboard WAKE(0=Disable,1=Enable) ; 83h.0
TWAK, 1, // TouchPad WAKE(0=Disable,1=Enable) ; 83h.1
, 1, // Reserved ; 83h.2

View File

@@ -23,7 +23,7 @@ Device (BATX)
0, // 0: Power Unit
0xFFFFFFFF, // 1: Design Capacity
0xFFFFFFFF, // 2: Last Full Charge Capacity
1, // 3: Battery Technology(Rechargable)
1, // 3: Battery Technology(Rechargeable)
10800, // 4: Design Voltage 10.8V
0, // 5: Design capacity of warning
0, // 6: Design capacity of low

View File

@@ -444,7 +444,7 @@ Device (EC0)
MBTH, 4, // bit 3-0: battery 0 highest level
SBTH, 4, // bit 7-4: battery 1 highest level
// note: if highest level is 0 or 0xF, it means not defined
// (in this case, use default hightest level, it is 6)
// (in this case, use default highest level, it is 6)
Offset(0xEF), // [EC Function Specification Major Version]
Offset(0xF0), // [Build ID]~ offset:0F7h