mb/google/guybrush: Enable PCIe devices in devicetree
BUG=b:181690884 TEST=builds Signed-off-by: Mathew King <mathewk@chromium.org> Change-Id: I8ceeb8db24be34588b370c13d865753f095e4be6 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51472 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
parent
0671d73690
commit
095bdecab3
@ -39,6 +39,11 @@ chip soc/amd/cezanne
|
|||||||
}"
|
}"
|
||||||
|
|
||||||
device domain 0 on
|
device domain 0 on
|
||||||
|
device ref gpp_bridge_0 on end # WLAN
|
||||||
|
device ref gpp_bridge_1 on end # SD
|
||||||
|
device ref gpp_bridge_2 on end # WWAN
|
||||||
|
device ref gpp_bridge_3 on end # NVMe
|
||||||
|
|
||||||
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
|
device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A
|
||||||
device ref gfx on end # Internal GPU (GFX)
|
device ref gfx on end # Internal GPU (GFX)
|
||||||
device ref xhci_0 on # USB 3.1 (USB0)
|
device ref xhci_0 on # USB 3.1 (USB0)
|
||||||
|
Loading…
x
Reference in New Issue
Block a user