Fix AMD Pistachio implicit declarations in the same way as with AMD
DBM690T. Remove trailing whitespace. Signed-off-by: Zheng Bao <Zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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committed by
Carl-Daniel Hailfinger
parent
a2f722abd4
commit
098d590d42
@@ -35,7 +35,7 @@
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extern int do_smbus_read_byte(u32 smbus_io_base, u32 device, u32 address);
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extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
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u8 val);
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extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
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extern void lb_add_memory_range(struct lb_memory *mem, uint32_t type,
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uint64_t start, uint64_t size);
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#define ADT7461_read_byte(address) \
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do_smbus_read_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address)
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@@ -246,16 +246,16 @@ void dbm690t_enable(device_t dev)
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get_ide_dma66();
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set_thermal_config();
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}
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int add_mainboard_resources(struct lb_memory *mem)
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{
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/* UMA is removed from system memory in the northbridge code, but
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* in some circumstances we want the memory mentioned as reserved.
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*/
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#if (CONFIG_GFXUMA == 1)
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printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
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#if (CONFIG_GFXUMA == 1)
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printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n",
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uma_memory_start, uma_memory_size);
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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lb_add_memory_range(mem, LB_MEM_RESERVED,
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uma_memory_start, uma_memory_size);
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#endif
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}
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