Danger: Initial mainboard import

This adds a directory with files copied over from Brain along with
build-related changes so that emerge-veyron_danger works. The next
patch will account for other differences.

BUG=none
BRANCH=none
TEST=emerge-veyron_danger coreboot works

Change-Id: I7ebd431cd48e257dfa761d32013d0e251b4f155d
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: a0f7d2f96540df6fdcd7a99d9e0fa02bbc6c1f73
Original-Signed-off-by: David Hendricks <dhendrix@chromium.org>
Original-Change-Id: Id265a7715f07a647a449f00097bf40f7c9b4c068
Original-Reviewed-on: https://chromium-review.googlesource.com/241711
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9646
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marc.jones@se-eng.com>

src/mainboard/google/veyron_danger/Kconfig

@@ -0,0 +1,89 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Rockchip Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+if BOARD_GOOGLE_VEYRON_DANGER
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select BOARD_ID_SUPPORT
+	select BOARD_ROMSIZE_KB_4096
+	select CHROMEOS_VBNV_FLASH
+	select COMMON_CBFS_SPI_WRAPPER
+	select HAVE_HARD_RESET
+	select MAINBOARD_DO_NATIVE_VGA_INIT
+	select MAINBOARD_HAS_CHROMEOS
+	select MAINBOARD_HAS_BOOTBLOCK_INIT
+	select RAM_CODE_SUPPORT
+	select RETURN_FROM_VERSTAGE
+	select SOC_ROCKCHIP_RK3288
+	select SPI_FLASH
+	select SPI_FLASH_GIGADEVICE
+	select SPI_FLASH_WINBOND
+	select VIRTUAL_DEV_SWITCH
+
+config MAINBOARD_DIR
+	string
+	default google/veyron_danger
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "Veyron_Brain"
+
+config MAINBOARD_VENDOR
+	string
+	default "Google"
+
+config VBOOT_RAMSTAGE_INDEX
+	hex
+	default 0x3
+
+config BOOT_MEDIA_SPI_BUS
+        int
+        default 2
+
+config DRAM_SIZE_MB
+	int
+	default 2048
+
+config DRIVER_TPM_I2C_BUS
+	hex
+	default 0x1
+
+config DRIVER_TPM_I2C_ADDR
+	hex
+	default 0x20
+
+config CONSOLE_SERIAL_UART_ADDRESS
+	hex
+	depends on CONSOLE_SERIAL_UART
+	default 0xFF690000
+
+# FIXME(dhendrix): This is a gross hack intended to get us past
+# display init which currently hangs the machine. It will be removed
+# once we've re-factored the display init code to properly handle
+# various types of displays.
+config SKIP_DISPLAY_INIT_HACK
+	int
+	default 1
+
+config PMIC_BUS
+	int
+	default 0
+
+endif #  BOARD_GOOGLE_VEYRON_DANGER