sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/system76: Enable S0ix for darp8/darp9

Browse Source 
The newer batch of these boards do not de-assert VW PLTRST# on S3
resume, causes the units to not power on in the EC code. Switch them to
S0ix by default, but leave S3 available.

Change-Id: I95337c1391102db9e020e82bdd938659c1a4f905
Signed-off-by: Tim Crawford <tcrawford@system76.com>
This commit is contained in:
Tim Crawford
2024-01-08 16:41:32 -07:00
parent 1a5bdc52cc
commit 09bdd1e515
2 changed files with 4 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/system76/adl/variants/darp8/overridetree.cb
View File

@ -1,4 +1,6 @@
chip soc/intel/alderlake chip soc/intel/alderlake
register "s0ix_enable" = "1"
register "power_limits_config[ADL_P_282_442_482_28W_CORE]" = "{ register "power_limits_config[ADL_P_282_442_482_28W_CORE]" = "{
.tdp_pl1_override = 20, .tdp_pl1_override = 20,
.tdp_pl2_override = 56, .tdp_pl2_override = 56,

2
src/mainboard/system76/rpl/variants/darp9/overridetree.cb
View File

@ -1,4 +1,6 @@
chip soc/intel/alderlake chip soc/intel/alderlake
register "s0ix_enable" = "1"
register "power_limits_config[RPL_P_682_482_282_28W_CORE]" = "{ register "power_limits_config[RPL_P_682_482_282_28W_CORE]" = "{
.tdp_pl1_override = 20, .tdp_pl1_override = 20,
.tdp_pl2_override = 56, .tdp_pl2_override = 56,