drivers/intel/fsp2_0: add FSP TempRamInit & TempRamExit API support

FSP v2.0 Specification adds APIs TempRamInit & TempRamExit for
Cache-As-Ram initialization and teardown.  Add fsp2_0 driver
support for TempRamInit & TempRamExit APIs.

Verified on Intel Leaf Hill CRB and confirmed that Cache-As-Ram
is correctly set up and torn down using the FSP v2.0 APIs
without coreboot implementation of CAR init/teardown.

Change-Id: I482ff580e1b5251a8214fe2e3d2d38bd5f3e3ed2
Signed-off-by: Brenton Dong <brenton.m.dong@intel.com>
Reviewed-on: https://review.coreboot.org/17062
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Brenton Dong
2016-10-18 11:35:15 -07:00
committed by Martin Roth
parent f7acdf82cb
commit 0a5971c91b
8 changed files with 85 additions and 0 deletions

View File

@@ -53,6 +53,11 @@ config DISPLAY_UPD_DATA
Display the user specified product data prior to memory
initialization.
config FSP_T_CBFS
string "Name of FSP-T in CBFS"
depends on FSP_CAR
default "fspt.bin"
config FSP_S_CBFS
string "Name of FSP-S in CBFS"
default "fsps.bin"
@@ -61,6 +66,12 @@ config FSP_M_CBFS
string "Name of FSP-M in CBFS"
default "fspm.bin"
config FSP_T_FILE
string "Intel FSP-T (temp ram init) binary path and filename"
depends on FSP_CAR
help
The path and filename of the Intel FSP-M binary for this platform.
config FSP_M_FILE
string "Intel FSP-M (memory init) binary path and filename"
depends on ADD_FSP_BINARIES
@@ -73,6 +84,13 @@ config FSP_S_FILE
help
The path and filename of the Intel FSP-S binary for this platform.
config FSP_CAR
bool "Use FSP TempRamInit & TempRamExit APIs"
depends on ADD_FSP_BINARIES
default n
help
Use FSP APIs to initialize & Tear Down the Cache-As-Ram
config FSP_M_XIP
bool "Is FSP-M XIP"
default n