drivers/intel/fsp2_0: add FSP TempRamInit & TempRamExit API support
FSP v2.0 Specification adds APIs TempRamInit & TempRamExit for Cache-As-Ram initialization and teardown. Add fsp2_0 driver support for TempRamInit & TempRamExit APIs. Verified on Intel Leaf Hill CRB and confirmed that Cache-As-Ram is correctly set up and torn down using the FSP v2.0 APIs without coreboot implementation of CAR init/teardown. Change-Id: I482ff580e1b5251a8214fe2e3d2d38bd5f3e3ed2 Signed-off-by: Brenton Dong <brenton.m.dong@intel.com> Reviewed-on: https://review.coreboot.org/17062 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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committed by
Martin Roth
parent
f7acdf82cb
commit
0a5971c91b
@@ -53,6 +53,11 @@ config DISPLAY_UPD_DATA
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Display the user specified product data prior to memory
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initialization.
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config FSP_T_CBFS
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string "Name of FSP-T in CBFS"
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depends on FSP_CAR
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default "fspt.bin"
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config FSP_S_CBFS
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string "Name of FSP-S in CBFS"
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default "fsps.bin"
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@@ -61,6 +66,12 @@ config FSP_M_CBFS
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string "Name of FSP-M in CBFS"
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default "fspm.bin"
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config FSP_T_FILE
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string "Intel FSP-T (temp ram init) binary path and filename"
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depends on FSP_CAR
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help
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The path and filename of the Intel FSP-M binary for this platform.
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config FSP_M_FILE
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string "Intel FSP-M (memory init) binary path and filename"
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depends on ADD_FSP_BINARIES
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@@ -73,6 +84,13 @@ config FSP_S_FILE
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help
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The path and filename of the Intel FSP-S binary for this platform.
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config FSP_CAR
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bool "Use FSP TempRamInit & TempRamExit APIs"
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depends on ADD_FSP_BINARIES
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default n
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help
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Use FSP APIs to initialize & Tear Down the Cache-As-Ram
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config FSP_M_XIP
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bool "Is FSP-M XIP"
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default n
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