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soc/amd/stoneyridge/acpi: rename sb_fch.asl to mmio.asl

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This file only contain the ACPI code describing the MMIO devices in the
FCH, so rename it to mmio.asl. This also brings the Stoneyridge ACPI
code a bit more in line with the ACPI code of the other SoCs.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iccef1fc5230e3e104d8dea586a9cbaf894471c12
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75597
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Felix Held 2023-06-01 23:22:11 +02:00
parent f6421311c9
commit 0b07e36a1f
2 changed files with 2 additions and 2 deletions
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src/soc/amd/stoneyridge/acpi/sb_fch.asl → src/soc/amd/stoneyridge/acpi/mmio.asl
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4
src/soc/amd/stoneyridge/acpi/soc.asl
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@ -15,8 +15,8 @@ Scope(PCI0) {
/* Describe PCI INT[A-H] for the Southbridge */ /* Describe PCI INT[A-H] for the Southbridge */
#include "pci_int.asl" #include "pci_int.asl"
/* Describe the devices in the Southbridge */ /* Describe the MMIO devices in the FCH */
#include "sb_fch.asl" #include "mmio.asl"
/* Add GPIO library */ /* Add GPIO library */
#include <soc/amd/common/acpi/gpio_bank_lib.asl> #include <soc/amd/common/acpi/gpio_bank_lib.asl>