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soc/amd/cezanne/acpi: Add pci0.asl

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This differs slightly from picasso. The PCI BAR region is between TOM1
and CONFIG_MMCONF_BASE_ADDRESS. This matches what the Intel platforms
are doing. It also matches what linux derives from the e820 tables:

> [mem 0xd0000000-0xf7ffffff] available for PCI devices

Picasso currently declares the region between TOM and IO_APIC_ADDR.
This region includes MMCONF. We don't want to map any PCI BARs in this
region.

TEST=Boot majolica and check logs
pci_bus 0000:00: root bus resource [io  0x0000-0x0cf7 window]
pci_bus 0000:00: root bus resource [io  0x0d00-0xffff window]
pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
pci_bus 0000:00: root bus resource [mem 0x000c0000-0x000dffff]
pci_bus 0000:00: root bus resource [mem 0xd0000000-0xf7ffffff]
pci_bus 0000:00: root bus resource [bus 00-3f]

Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I4ff02012795e2166e3a4197071b1136727089318
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50893
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Raul E Rangel
2021-02-12 15:13:57 -07:00
committed by Patrick Georgi
parent 58a8ad1661
commit 0b123dd72e
3 changed files with 90 additions and 0 deletions
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7
src/soc/amd/cezanne/root_complex.c
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@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <amdblocks/acpi.h>
#include <amdblocks/memmap.h>
#include <cbmem.h>
#include <console/console.h>
@ -130,6 +131,11 @@ static void read_resources(struct device *dev)
}
}
static void root_complex_fill_ssdt(const struct device *device)
{
acpi_fill_root_complex_tom(device);
}
static const char *gnb_acpi_name(const struct device *dev)
{
return "GNB";
@ -140,6 +146,7 @@ static struct device_operations root_complex_operations = {
.set_resources = noop_set_resources,
.enable_resources = pci_dev_enable_resources,
.acpi_name = gnb_acpi_name,
.acpi_fill_ssdt = root_complex_fill_ssdt,
};
static const struct pci_driver family17_root_complex __pci_driver = {