From 0b39379c9c85d693b74ae7e954298bc4760285f3 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 12 Mar 2021 12:54:45 +0100 Subject: [PATCH] sb/intel/lynxpoint: Replace HPET_ADDR The `HPET_ADDRESS` Kconfig option has the same value. Use it instead. Change-Id: I268e949d4396aa20e38f719b36cc4e6226efe082 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/49743 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/northbridge/intel/haswell/romstage.c | 2 +- src/southbridge/intel/lynxpoint/pch.h | 2 -- 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/src/northbridge/intel/haswell/romstage.c b/src/northbridge/intel/haswell/romstage.c index fa3c523a27..7b4182e65e 100644 --- a/src/northbridge/intel/haswell/romstage.c +++ b/src/northbridge/intel/haswell/romstage.c @@ -56,7 +56,7 @@ void mainboard_romstage_entry(void) .epbar = CONFIG_FIXED_EPBAR_MMIO_BASE, .pciexbar = CONFIG_MMCONF_BASE_ADDRESS, .smbusbar = CONFIG_FIXED_SMBUS_IO_BASE, - .hpet_address = HPET_ADDR, + .hpet_address = CONFIG_HPET_ADDRESS, .rcba = CONFIG_FIXED_RCBA_MMIO_BASE, .pmbase = DEFAULT_PMBASE, .gpiobase = DEFAULT_GPIOBASE, diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 9c6a668214..000d159e27 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -63,8 +63,6 @@ #define DEFAULT_GPIOSIZE 0x80 #endif -#define HPET_ADDR 0xfed00000 - #include #ifndef __ACPI__